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authorPatrick Georgi <patrick@georgi-clan.de>2014-05-17 14:00:12 +0200
committerPatrick Georgi <patrick@georgi-clan.de>2014-05-17 21:14:29 +0200
commit58f73a69cd83c46604795d728f296779c1de162c (patch)
tree742e007e50dc825988281e8c6b52da902a1f38bf /src/soc
parent98f49d28233f68aeb9dfccc6d7e633ae35449e00 (diff)
build: separate CPPFLAGS from CFLAGS
There are a couple of places where CPPFLAGS are pasted into CFLAGS, eliminate them. Change-Id: Ic7f568cf87a7d9c5c52e2942032a867161036bd7 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5765 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/baytrail/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc
index 179f2a64ee..d4f653ec88 100644
--- a/src/soc/intel/baytrail/Makefile.inc
+++ b/src/soc/intel/baytrail/Makefile.inc
@@ -53,7 +53,7 @@ ramstage-$(CONFIG_ELOG) += elog.c
# Remove as ramstage gets fleshed out
ramstage-y += placeholders.c
-CPPFLAGS += -Isrc/soc/intel/baytrail/
+CPPFLAGS_common += -Isrc/soc/intel/baytrail/
# Run an intermediate step when producing coreboot.rom
# that adds additional components to the final firmware