diff options
| author | Marco Chen <marcochen@chromium.org> | 2020-03-26 22:23:17 +0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-04-07 06:31:12 +0000 |
| commit | 540af0960217a1d25600d6ef5f0048f4a9b391fd (patch) | |
| tree | 94cba470ba4b10502eb3d965e0e18308f6a74fb9 /src/soc | |
| parent | 1b7fc32a54ea962a30da8daee5827003087843ec (diff) | |
soc/intel/tigerlake: Allow mainboard to override DRAM part number
In order to support mainboards that do not store DRAM part number in
the traditional way i.e. within the CBFS SPD for soldered memory, this
change provides a runtime callback to allow mainboards to provide DRAM
part number from a custom location e.g. external EEPROM on volteer /
dedede.
For other boards it should be a NOP since the weak implementation of
mainboard_get_dram_part_num does nothing.
BUG=b:152019429
Change-Id: If940a76d36a7645a7441ba418aa7aec9af9f6319
Signed-off-by: Marco Chen <marcochen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39860
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/tigerlake/include/soc/romstage.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/tigerlake/romstage/romstage.c | 25 |
2 files changed, 25 insertions, 2 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/romstage.h b/src/soc/intel/tigerlake/include/soc/romstage.h index 4a4fbe63b8..e3c7969127 100644 --- a/src/soc/intel/tigerlake/include/soc/romstage.h +++ b/src/soc/intel/tigerlake/include/soc/romstage.h @@ -6,6 +6,8 @@ #include <fsp/api.h> +/* Provide a callback to allow mainboard to override the DRAM part number. */ +bool mainboard_get_dram_part_num(const char **part_num, size_t *len); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); void pch_init(void); diff --git a/src/soc/intel/tigerlake/romstage/romstage.c b/src/soc/intel/tigerlake/romstage/romstage.c index fa9db6e29e..dc5dcf1a9b 100644 --- a/src/soc/intel/tigerlake/romstage/romstage.c +++ b/src/soc/intel/tigerlake/romstage/romstage.c @@ -22,6 +22,12 @@ 0x8d, 0x09, 0x11, 0xcf, 0x8b, 0x9f, 0x03, 0x23 \ } +bool __weak mainboard_get_dram_part_num(const char **part_num, size_t *len) +{ + /* Default weak implementation, no need to override part number. */ + return false; +} + /* Save the DIMM information for SMBIOS table 17 */ static void save_dimm_info(void) { @@ -36,6 +42,9 @@ static void save_dimm_info(void) const uint8_t smbios_memory_info_guid[16] = FSP_SMBIOS_MEMORY_INFO_GUID; const uint8_t *serial_num; + const char *dram_part_num = NULL; + size_t dram_part_num_len; + bool is_dram_part_overridden = false; /* Locate the memory info HOB, presence validated by raminit */ meminfo_hob = fsp_find_extension_hob_by_guid( @@ -57,6 +66,10 @@ static void save_dimm_info(void) } memset(mem_info, 0, sizeof(*mem_info)); + /* Allow mainboard to override DRAM part number. */ + is_dram_part_overridden = mainboard_get_dram_part_num(&dram_part_num, + &dram_part_num_len); + /* Save available DIMM information */ index = 0; dimm_max = ARRAY_SIZE(mem_info->dimm); @@ -75,6 +88,14 @@ static void save_dimm_info(void) if (src_dimm->Status != DIMM_PRESENT) continue; + /* If there is no DRAM part number overridden by + * mainboard then use original one. */ + if (!is_dram_part_overridden) { + dram_part_num_len = sizeof(src_dimm->ModulePartNum); + dram_part_num = (const char *) + &src_dimm->ModulePartNum[0]; + } + u8 memProfNum = meminfo_hob->MemoryProfile; serial_num = src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL; @@ -87,8 +108,8 @@ static void save_dimm_info(void) src_dimm->RankInDimm, channel_info->ChannelId, src_dimm->DimmId, - (const char *)src_dimm->ModulePartNum, - sizeof(src_dimm->ModulePartNum), + dram_part_num, + dram_part_num_len, serial_num, meminfo_hob->DataWidth, meminfo_hob->VddVoltage[memProfNum], |