diff options
| author | Julian Schroeder <julianmarcusschroeder@gmail.com> | 2021-09-07 14:54:19 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-08 20:45:33 +0000 |
| commit | 46719834010ce1f4c8ecbc12c9c52baa349ecf9d (patch) | |
| tree | e7b1fcf3c593674936dd3660eef8baf7961288e6 /src/soc | |
| parent | f4a992cca73f227ac86a4e9590198cea72b8b767 (diff) | |
soc/amd/cezanne/fsp_m_params: set usb_phy version and length.
Setting the usb_phy version and length in the soc code instead of devicetree.
That way the devicetree code does not have to reapeat it for different
AMD Cezanne based systems.
Tested on guybrush by changing phy settings in devicetree and then checking
the usb phy register.
Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com>
Change-Id: I2db49e095672054b9b15042fb003a93b67e3a4c9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57478
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/cezanne/fsp_m_params.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/fsp_m_params.c b/src/soc/amd/cezanne/fsp_m_params.c index c641030088..c9853a7d40 100644 --- a/src/soc/amd/cezanne/fsp_m_params.c +++ b/src/soc/amd/cezanne/fsp_m_params.c @@ -229,8 +229,12 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) mcfg->hda_enable = devtree_hda_dev_enabled(); mcfg->sata_enable = devtree_sata_dev_enabled(); - if (config->usb_phy_custom) + if (config->usb_phy_custom) { mcfg->usb_phy = (struct usb_phy_config *)&config->usb_phy; + mcfg->usb_phy->Version_Major = 0xd; + mcfg->usb_phy->Version_Minor = 0x6; + mcfg->usb_phy->TableLength = 100; + } else mcfg->usb_phy = NULL; |