diff options
| author | Kane Chen <kane.chen@intel.corp-partner.google.com> | 2023-10-25 15:25:16 +0800 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-11-04 16:56:48 +0000 |
| commit | 429c304725e819df02db9ac69179efe7daa1eb49 (patch) | |
| tree | a201297f535ff0f4636475e8855eccbf672b6593 /src/soc | |
| parent | 22e0ffabeb1085df3e4b1dccc8d6b903494eb2d8 (diff) | |
soc/intel/meteorlake: Consolidate settings for enabling tracehub
To get tracehub working, it requires few settings such as
SOC_INTEL_METEORLAKE_DEBUG_CONSENT=2 and enable tracehub device in
dev tree. This commit binds all tracehub related settings to Kconfig,
so that users only need to enable SOC_INTEL_COMMON_BLOCK_TRACEHUB
TEST=boot on screebo and test tracehub device exists and working
Change-Id: Ie830fe2fd38e3456497bea37fe42ca60d26ca305
Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78648
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/meteorlake/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/chip.c | 15 |
2 files changed, 16 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index 05d7f70256..a2f2706145 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -353,6 +353,7 @@ config SOC_INTEL_METEORLAKE_DEBUG_CONSENT # USB DBC is more common for developers so make this default to 6 if # SOC_INTEL_DEBUG_CONSENT=y default 6 if SOC_INTEL_DEBUG_CONSENT + default 2 if SOC_INTEL_COMMON_BLOCK_TRACEHUB default 0 help This is to control debug interface on SOC. diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c index a1b19682af..be957cc51f 100644 --- a/src/soc/intel/meteorlake/chip.c +++ b/src/soc/intel/meteorlake/chip.c @@ -151,6 +151,18 @@ static void soc_fill_gpio_pm_configuration(void) gpio_pm_configure(value, TOTAL_GPIO_COMM); } +/* Enable tracehub in device tree */ +static void soc_enable_tracehub(void) +{ + struct device *dev; + + dev = pcidev_path_on_root(PCI_DEVFN_NPK); + if (dev) { + dev->enabled = 1; + printk(BIOS_DEBUG, "Tracehub is enabled.\n"); + } +} + void soc_init_pre_device(void *chip_info) { config_t *config = config_of_soc(); @@ -159,6 +171,9 @@ void soc_init_pre_device(void *chip_info) config->tbt_authentication = ioe_p2sb_sbi_read(PID_IOM, IOM_CSME_IMR_TBT_STATUS) & TBT_VALID_AUTHENTICATION; + if (CONFIG(SOC_INTEL_COMMON_BLOCK_TRACEHUB)) + soc_enable_tracehub(); + /* Perform silicon specific init. */ fsp_silicon_init(); |