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authorFelix Held <felix-coreboot@felixheld.de>2023-07-14 19:58:49 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-07-17 14:12:13 +0000
commit36149888f6b26b3b268343b55251bf3aafc05296 (patch)
tree472eef8cde238ac7bff93c1627b5aa138b7a7010 /src/soc
parent0f5f2ceb550c7c830950cd3e5b8f277c37dda185 (diff)
soc/amd/common/pm/pmlib: use PM register mapping in ACPIMMIO region
In all SoC pm_set_power_failure_state gets called either after a call to enable_acpimmio_decode_pm04() or the ACPIMMIO mapping is already enabled after reset on the SoC. This allows to use pm_read8 and pm_write8 that use the ACPIMMIO mapping of the PM registers instead of pm_io_read8 and pm_io_write8 which won't work on Phoenix and Glinda due to the IO ports used on older generations to access to the PM registers not being implemented any more. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id0d0523d2c4920da41b3fb73cf62f22a60f1643a Reviewed-on: https://review.coreboot.org/c/coreboot/+/76463 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/common/block/pm/pmlib.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/pm/pmlib.c b/src/soc/amd/common/block/pm/pmlib.c
index 5ce6b7bd0e..86cb2cf896 100644
--- a/src/soc/amd/common/block/pm/pmlib.c
+++ b/src/soc/amd/common/block/pm/pmlib.c
@@ -37,5 +37,5 @@ void pm_set_power_failure_state(void)
break;
}
- pm_io_write8(PM_RTC_SHADOW_REG, pwr_fail);
+ pm_write8(PM_RTC_SHADOW_REG, pwr_fail);
}