diff options
author | Angel Pons <th3fanbus@gmail.com> | 2021-06-23 14:39:32 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2022-08-14 10:53:47 +0000 |
commit | 333751b22e046793d84d72d1053b9c6aa2854d77 (patch) | |
tree | 5750680fb5ba2834b7cff29ae813f145972b7b9b /src/soc | |
parent | eb80d8da8862aa49b0b6b67e0166fa831f8f1343 (diff) |
broadwell: Compute channel disable masks at runtime
Introduce the `SPD_MEMORY_DOWN` macro to indicate that a slot is used
with memory-down. This enables computing the channel disable masks as
the bits for slots where the SPD address is zero. To preserve current
behavior, zero the SPD addresses for memory-down slots afterwards.
Change-Id: I75b7be7c72062d1a26cfc7b09b79de62de0a9cea
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55807
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/broadwell/include/soc/pei_wrapper.h | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/raminit.c | 20 |
2 files changed, 22 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/include/soc/pei_wrapper.h b/src/soc/intel/broadwell/include/soc/pei_wrapper.h index 4a38a2afa6..cfdb910064 100644 --- a/src/soc/intel/broadwell/include/soc/pei_wrapper.h +++ b/src/soc/intel/broadwell/include/soc/pei_wrapper.h @@ -26,6 +26,8 @@ static inline void pei_data_usb3_port(struct pei_data *pei_data, int port, pei_data->usb3_ports[port].fixed_eq = fixed_eq; } +#define SPD_MEMORY_DOWN 0xff + void broadwell_fill_pei_data(struct pei_data *pei_data); void mainboard_fill_pei_data(struct pei_data *pei_data); void mainboard_fill_spd_data(struct pei_data *pei_data); diff --git a/src/soc/intel/broadwell/raminit.c b/src/soc/intel/broadwell/raminit.c index 95073d3194..70f38043cd 100644 --- a/src/soc/intel/broadwell/raminit.c +++ b/src/soc/intel/broadwell/raminit.c @@ -177,6 +177,17 @@ static void setup_sdram_meminfo(struct pei_data *pei_data) } } +/* + * 0 = leave channel enabled + * 1 = disable dimm 0 on channel + * 2 = disable dimm 1 on channel + * 3 = disable dimm 0+1 on channel + */ +static int make_channel_disabled_mask(const struct pei_data *pd, int ch) +{ + return (!pd->spd_addresses[ch + ch] << 0) | (!pd->spd_addresses[ch + ch + 1] << 1); +} + void perform_raminit(const struct chipset_power_state *const power_state) { const int s3resume = power_state->prev_sleep_state == ACPI_S3; @@ -186,6 +197,15 @@ void perform_raminit(const struct chipset_power_state *const power_state) mainboard_fill_pei_data(&pei_data); mainboard_fill_spd_data(&pei_data); + /* Calculate unimplemented DIMM slots for each channel */ + pei_data.dimm_channel0_disabled = make_channel_disabled_mask(&pei_data, 0); + pei_data.dimm_channel1_disabled = make_channel_disabled_mask(&pei_data, 1); + + for (size_t i = 0; i < ARRAY_SIZE(pei_data.spd_addresses); i++) { + const uint8_t addr = pei_data.spd_addresses[i]; + pei_data.spd_addresses[i] = addr == SPD_MEMORY_DOWN ? 0 : addr; + } + post_code(0x32); timestamp_add_now(TS_INITRAM_START); |