diff options
| author | Martin Roth <martin.roth@se-eng.com> | 2015-01-04 16:54:35 -0700 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2015-01-06 06:32:37 +0100 |
| commit | 32bc6b6b8425e800d18f4fb8a34aa5badb1cd329 (patch) | |
| tree | b2860245cb4b3134018df15ab02aa74a413e2d07 /src/soc | |
| parent | 0b2c4ece7d909fae41c4fc1821a48dd2758093d0 (diff) | |
doxygen fixes: fix parameter names to match the functions
The doxygen parameter names in the comments no longer matched the
functions they were attached to. Doxygen complains about extra
parameter comments and uncommented parameters in the functions.
Change-Id: I21b8a951f8d8d04b07c3779000eeaf1e69fed463
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/8101
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/samsung/exynos5250/clock.c | 4 | ||||
| -rw-r--r-- | src/soc/samsung/exynos5420/clock.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/samsung/exynos5250/clock.c b/src/soc/samsung/exynos5250/clock.c index 1de2ab2420..a00af0232a 100644 --- a/src/soc/samsung/exynos5250/clock.c +++ b/src/soc/samsung/exynos5250/clock.c @@ -475,8 +475,8 @@ void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor) * * @param main_scalar_bits Number of main scalar bits, must be > 0 and < 32 * @param fine_scalar_bits Number of fine scalar bits, must be > 0 and < 32 - * @param input_freq Clock frequency to be scaled in Hz - * @param target_freq Desired clock frequency in Hz + * @param input_rate Clock frequency to be scaled in Hz + * @param target_rate Desired clock frequency in Hz * @param best_fine_scalar Pointer to store the fine stage divisor * * @return best_main_scalar Main scalar for desired frequency or -1 if none diff --git a/src/soc/samsung/exynos5420/clock.c b/src/soc/samsung/exynos5420/clock.c index 5bbeb04ffe..5cf3583c87 100644 --- a/src/soc/samsung/exynos5420/clock.c +++ b/src/soc/samsung/exynos5420/clock.c @@ -439,8 +439,8 @@ void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor) * * @param main_scalar_bits Number of main scalar bits, must be > 0 and < 32 * @param fine_scalar_bits Number of fine scalar bits, must be > 0 and < 32 - * @param input_freq Clock frequency to be scaled in Hz - * @param target_freq Desired clock frequency in Hz + * @param input_rate Clock frequency to be scaled in Hz + * @param target_rate Desired clock frequency in Hz * @param best_fine_scalar Pointer to store the fine stage divisor * * @return best_main_scalar Main scalar for desired frequency or -1 if none |