tree: Remove blank lines before '}' and after '{'

Change-Id: I46a362270f69d0a4a28e5bb9c954f34d632815ff
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81455
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

16 files changed, 0 insertions, 19 deletions

diff --git a/src/soc/nvidia/tegra/dc.h b/src/soc/nvidia/tegra/dc.h
index 6743a105c4..34d64aa018 100644
--- a/src/soc/nvidia/tegra/dc.h
+++ b/src/soc/nvidia/tegra/dc.h
@@ -247,7 +247,6 @@ enum dc_winc_filter_p {
 
 /* Window A/B/C register 0x500 ~ 0x628 */
 struct dc_winc_reg {
-
 	/* Address 0x500 */
 	u32 color_palette;		/* _WINC_COLOR_PALETTE_0 */
 
diff --git a/src/soc/nvidia/tegra124/dp.c b/src/soc/nvidia/tegra124/dp.c
index de98d650cc..cc14c2ee4c 100644
--- a/src/soc/nvidia/tegra124/dp.c
+++ b/src/soc/nvidia/tegra124/dp.c
@@ -440,7 +440,6 @@ static void tegra_dc_dp_dump_link_cfg(struct tegra_dc_dp_data *dp,
 static int _tegra_dp_lower_link_config(struct tegra_dc_dp_data *dp,
 	struct tegra_dc_dp_link_config *cfg)
 {
-
 	switch (cfg->link_bw){
 	case SOR_LINK_SPEED_G1_62:
 		if (cfg->max_link_bw > SOR_LINK_SPEED_G1_62)
diff --git a/src/soc/nvidia/tegra124/include/soc/sdram_param.h b/src/soc/nvidia/tegra124/include/soc/sdram_param.h
index b19ae5fa7f..8c71d80512 100644
--- a/src/soc/nvidia/tegra124/include/soc/sdram_param.h
+++ b/src/soc/nvidia/tegra124/include/soc/sdram_param.h
@@ -51,7 +51,6 @@ enum {
  * Defines the SDRAM parameter structure
  */
 struct sdram_params {
-
 	/* Specifies the type of memory device */
 	uint32_t MemoryType;
 
diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c
index 8246a098e5..2feea6b1c1 100644
--- a/src/soc/nvidia/tegra124/sor.c
+++ b/src/soc/nvidia/tegra124/sor.c
@@ -722,7 +722,6 @@ void tegra_dc_sor_enable_dp(struct tegra_dc_sor_data *sor)
 	tegra_dc_sor_power_dplanes(sor, link_cfg->lane_count, 1);
 
 	tegra_dc_sor_set_dp_mode(sor, link_cfg);
-
 }
 
 void tegra_dc_sor_attach(struct tegra_dc_sor_data *sor)
diff --git a/src/soc/nvidia/tegra210/addressmap.c b/src/soc/nvidia/tegra210/addressmap.c
index 249d787059..b8238f3012 100644
--- a/src/soc/nvidia/tegra210/addressmap.c
+++ b/src/soc/nvidia/tegra210/addressmap.c
@@ -38,7 +38,6 @@ int sdram_size_mb(void)
 static void carveout_from_regs(uintptr_t *base_mib, size_t *size_mib,
 				uint32_t bom, uint32_t bom_hi, uint32_t size)
 {
-
 	/* All size regs of carveouts are in MiB. */
 	if (size == 0)
 		return;
diff --git a/src/soc/nvidia/tegra210/dp.c b/src/soc/nvidia/tegra210/dp.c
index f6f955c51e..4eb6e62aec 100644
--- a/src/soc/nvidia/tegra210/dp.c
+++ b/src/soc/nvidia/tegra210/dp.c
@@ -452,7 +452,6 @@ static void tegra_dc_dp_dump_link_cfg(struct tegra_dc_dp_data *dp,
 static int _tegra_dp_lower_link_config(struct tegra_dc_dp_data *dp,
 	struct tegra_dc_dp_link_config *link_cfg)
 {
-
 	switch (link_cfg->link_bw) {
 	case SOR_LINK_SPEED_G1_62:
 		if (link_cfg->max_link_bw > SOR_LINK_SPEED_G1_62)
@@ -1457,7 +1456,6 @@ static int tegra_dc_dp_sink_out_of_sync(struct tegra_dc_dp_data *dp,
 static void tegra_dc_dp_check_sink(struct tegra_dc_dp_data *dp,
 				struct soc_nvidia_tegra210_config *config)
 {
-
 	u8 max_retry = 3;
 	int delay_frame;
 
diff --git a/src/soc/nvidia/tegra210/include/soc/funitcfg.h b/src/soc/nvidia/tegra210/include/soc/funitcfg.h
index 493c9a0244..99214f714c 100644
--- a/src/soc/nvidia/tegra210/include/soc/funitcfg.h
+++ b/src/soc/nvidia/tegra210/include/soc/funitcfg.h
@@ -30,7 +30,6 @@ enum {
  * currently the I2C is 0-based and SPI is 1-based in its indexing.
  */
 enum {
-
 	I2C1_BUS = 0,
 	I2C2_BUS = 1,
 	I2C3_BUS = 2,
diff --git a/src/soc/nvidia/tegra210/include/soc/sdram_param.h b/src/soc/nvidia/tegra210/include/soc/sdram_param.h
index f9d7c6b592..22f3674c9f 100644
--- a/src/soc/nvidia/tegra210/include/soc/sdram_param.h
+++ b/src/soc/nvidia/tegra210/include/soc/sdram_param.h
@@ -54,7 +54,6 @@ enum {
  * Defines the SDRAM parameter structure
  */
 struct sdram_params {
-
 	/* Specifies the type of memory device */
 	uint32_t MemoryType;
 
diff --git a/src/soc/nvidia/tegra210/mipi-phy.c b/src/soc/nvidia/tegra210/mipi-phy.c
index 48a908a7d3..0e5897f160 100644
--- a/src/soc/nvidia/tegra210/mipi-phy.c
+++ b/src/soc/nvidia/tegra210/mipi-phy.c
@@ -13,7 +13,6 @@
 
 int mipi_dphy_set_timing(struct tegra_dsi *dsi)
 {
-
 	u32 freq = (dsi->clk_rate * 2) / 1000000;
 
 	u32 thsdexit = (DSI_PHY_TIMING_DIV(120, (freq)));
diff --git a/src/soc/nvidia/tegra210/sdram.c b/src/soc/nvidia/tegra210/sdram.c
index 702897f1ae..e00c61580b 100644
--- a/src/soc/nvidia/tegra210/sdram.c
+++ b/src/soc/nvidia/tegra210/sdram.c
@@ -798,7 +798,6 @@ static void sdram_set_clock_enable_signal(const struct sdram_params *param,
 	uint32_t val = 0;
 
 	if (param->MemoryType == NvBootMemoryType_LpDdr4) {
-
 		val = (param->EmcPinGpioEn << EMC_PIN_GPIOEN_SHIFT) |
 		      (param->EmcPinGpio << EMC_PIN_GPIO_SHIFT);
 		write32(&regs->pin, val);
@@ -835,7 +834,6 @@ static void sdram_set_clock_enable_signal(const struct sdram_params *param,
 		die("Failed to program EMC pin.");
 
 	if (param->MemoryType != NvBootMemoryType_LpDdr4) {
-
 		/* Send NOP (trigger just needs to be non-zero) */
 		writebits(((1 << EMC_NOP_CMD_SHIFT) |
 			  (param->EmcDevSelect << EMC_NOP_DEV_SELECTN_SHIFT)),
diff --git a/src/soc/nvidia/tegra210/sor.c b/src/soc/nvidia/tegra210/sor.c
index c24e0d6345..9d6f94d2e9 100644
--- a/src/soc/nvidia/tegra210/sor.c
+++ b/src/soc/nvidia/tegra210/sor.c
@@ -716,7 +716,6 @@ void tegra_dc_sor_enable_dp(struct tegra_dc_sor_data *sor)
 	tegra_dc_sor_power_dplanes(sor, link_cfg->lane_count, 1);
 
 	tegra_dc_sor_set_dp_mode(sor, link_cfg);
-
 }
 
 void tegra_dc_sor_attach(struct tegra_dc_sor_data *sor)
diff --git a/src/soc/samsung/exynos5250/clock_init.c b/src/soc/samsung/exynos5250/clock_init.c
index 1c13466ba9..12fc5c6410 100644
--- a/src/soc/samsung/exynos5250/clock_init.c
+++ b/src/soc/samsung/exynos5250/clock_init.c
@@ -411,7 +411,6 @@ void clock_gate(void)
 	clrbits32(&exynos_clock->gate_ip_cdrex, CLK_DPHY0_MASK |
 						CLK_DPHY1_MASK |
 						CLK_TZASC_DRBXR_MASK);
-
 }
 
 void clock_init_dp_clock(void)
diff --git a/src/soc/samsung/exynos5250/dp-reg.c b/src/soc/samsung/exynos5250/dp-reg.c
index b93a9b8c1a..7e5494de15 100644
--- a/src/soc/samsung/exynos5250/dp-reg.c
+++ b/src/soc/samsung/exynos5250/dp-reg.c
@@ -115,7 +115,6 @@ int s5p_dp_init_analog_func(struct s5p_dp_device *dp)
 
 	/* Power up PLL */
 	if (s5p_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
-
 		clrbits32(&base->dp_pll_ctl, DP_PLL_PD);
 
 		stopwatch_init_msecs_expire(&sw, PLL_LOCK_TIMEOUT);
diff --git a/src/soc/samsung/exynos5420/dmc_init_ddr3.c b/src/soc/samsung/exynos5420/dmc_init_ddr3.c
index a187f6e090..e716d5833e 100644
--- a/src/soc/samsung/exynos5420/dmc_init_ddr3.c
+++ b/src/soc/samsung/exynos5420/dmc_init_ddr3.c
@@ -186,7 +186,6 @@ int ddr3_mem_ctrl_init(struct mem_timings *mem, int interleave_size, int reset)
 	}
 
 	if (mem->gate_leveling_enable) {
-
 		write32(&exynos_phy0_control->phy_con0, PHY_CON0_RESET_VAL);
 		write32(&exynos_phy1_control->phy_con0, PHY_CON0_RESET_VAL);
 
diff --git a/src/soc/samsung/exynos5420/dp.c b/src/soc/samsung/exynos5420/dp.c
index 13a8feff41..f28c87d5bb 100644
--- a/src/soc/samsung/exynos5420/dp.c
+++ b/src/soc/samsung/exynos5420/dp.c
@@ -142,7 +142,6 @@ static unsigned int exynos_dp_read_edid(void)
 			exynos_dp_write_byte_to_dpcd(DPCD_TEST_RESPONSE,
 				DPCD_TEST_EDID_CHECKSUM_WRITE);
 		}
-
 	}
 
 	return 0;
@@ -338,7 +337,6 @@ static unsigned int exynos_dp_enable_rx_to_enhanced_mode(unsigned char enable)
 	if (ret != EXYNOS_DP_SUCCESS) {
 		printk(BIOS_ERR, "DP write_to_dpcd failed\n");
 		return -1;
-
 	}
 
 	return ret;
diff --git a/src/soc/sifive/fu540/ux00ddr.h b/src/soc/sifive/fu540/ux00ddr.h
index aebf91a2d4..ec0ef2c8ec 100644
--- a/src/soc/sifive/fu540/ux00ddr.h
+++ b/src/soc/sifive/fu540/ux00ddr.h
@@ -110,7 +110,6 @@ static inline void ux00ddr_setuprangeprotection(size_t ahbregaddr, size_t end_ad
   _REG32(225<<2, ahbregaddr) = 0xFFFFFFFF;
   _REG32(208<<2, ahbregaddr) |= (1 << AXI0_ADDRESS_RANGE_ENABLE);
   _REG32(208<<2, ahbregaddr) |= (1 << PORT_ADDR_PROTECTION_EN_OFFSET);
-
 }
 
 static inline void ux00ddr_disableaxireadinterleave(size_t ahbregaddr) {