diff options
| author | Shuo Liu <shuo.liu@intel.com> | 2024-04-10 01:42:06 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-04-10 10:52:34 +0000 |
| commit | 2f9a579048a406fa9637d4116be9c96a8a936bec (patch) | |
| tree | 3088c5896ea88ffca69d7a6cbddb4420388b1e32 /src/soc | |
| parent | e2dd36c6bcdd940cfacdfa5773b367164bc96429 (diff) | |
soc/intel/xeon_sp: Remove MAINBOARD_USES_FSP2_0
MAINBOARD_USES_FSP2_0 selects PLATFORM_USES_FSP2_0 and
POSTCAR_STAGE which are used by all Xeon-SP platforms.
After the removal of MAINBOARD_USES_FSP2_0, PLATFORM_USES_FSP2_0
is implicitly selected by SoC Kconfigs in PLATFORM_USES_FSP2_X,
POSTCAR_STAGE is selected by XEON_SP_COMMON_BASE.
TEST=Build and boot on intel/archercity CRB
Change-Id: I45332d49dd21f9749fce458877777a4b783a1b11
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81783
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/xeon_sp/Kconfig | 7 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/skx/Kconfig | 5 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/Kconfig | 1 |
3 files changed, 1 insertions, 12 deletions
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 78227ed4ae..51f407ef3a 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -45,15 +45,10 @@ config XEON_SP_COMMON_BASE select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE + select POSTCAR_STAGE if XEON_SP_COMMON_BASE -config MAINBOARD_USES_FSP2_0 - bool - default y - select PLATFORM_USES_FSP2_0 - select POSTCAR_STAGE - config MAX_SOCKET int default 2 diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig index 4a9e6831d3..25e35bda35 100644 --- a/src/soc/intel/xeon_sp/skx/Kconfig +++ b/src/soc/intel/xeon_sp/skx/Kconfig @@ -11,13 +11,8 @@ config SOC_INTEL_SKYLAKE_SP if SOC_INTEL_SKYLAKE_SP -config MAINBOARD_USES_FSP2_0 - bool - default y - config FSP_HEADER_PATH string "Location of FSP headers" - depends on MAINBOARD_USES_FSP2_0 default "src/vendorcode/intel/fsp/fsp2_0/skylake_sp" config MAX_SOCKET diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig index 2e0ad01e00..b40a53494b 100644 --- a/src/soc/intel/xeon_sp/spr/Kconfig +++ b/src/soc/intel/xeon_sp/spr/Kconfig @@ -28,7 +28,6 @@ config CHIPSET_DEVICETREE config FSP_HEADER_PATH string "Location of FSP headers" - depends on MAINBOARD_USES_FSP2_0 default "src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp" config MAX_CPUS |