diff options
| author | Evan Green <evgreen@chromium.org> | 2020-10-06 16:41:11 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-12 08:38:04 +0000 |
| commit | 1f8af4f49b9556eb5540948f664549c07af58ef4 (patch) | |
| tree | 8ee434249113fc8b1242a34b90422b1c65d29d1b /src/soc | |
| parent | 4e86131462786f3a9898d90cfa1602b1e157bb5c (diff) | |
soc/intel/jasperlake: Remove GPIO community 2 from DSDT
The kernel driver enumerates communities 0, 1, 4, and 5, and assigns
these addresses based on the BARs enumerated by coreboot. Coreboot
was defining communities 0, 1, 2, 4, and 5. This meant the kernel
was not controlling GPIOs in communities 4 and 5, since the resources
were wrong.
Remove community 2 for now. We can add it back if the kernel ends up
needing it.
BUG=b:169444894
TEST=Test controlling GPP_E5, verify actually toggles register.
Signed-off-by: Evan Green <evgreen@chromium.org>
Change-Id: I823e1aa942cfccadde01b9371d481457ab088c31
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46115
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/jasperlake/acpi/gpio.asl | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/soc/intel/jasperlake/acpi/gpio.asl b/src/soc/intel/jasperlake/acpi/gpio.asl index e39ac8afc2..421abc3a21 100644 --- a/src/soc/intel/jasperlake/acpi/gpio.asl +++ b/src/soc/intel/jasperlake/acpi/gpio.asl @@ -18,7 +18,6 @@ Device (GPIO) { Memory32Fixed (ReadWrite, 0, 0, COM0) Memory32Fixed (ReadWrite, 0, 0, COM1) - Memory32Fixed (ReadWrite, 0, 0, COM2) Memory32Fixed (ReadWrite, 0, 0, COM4) Memory32Fixed (ReadWrite, 0, 0, COM5) Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ) @@ -39,12 +38,6 @@ Device (GPIO) BAS1 = ^^PCRB (PID_GPIOCOM1) LEN1 = GPIO_BASE_SIZE - /* GPIO Community 2 */ - CreateDWordField (^RBUF, ^COM2._BAS, BAS2) - CreateDWordField (^RBUF, ^COM2._LEN, LEN2) - BAS2 = ^^PCRB (PID_GPIOCOM2) - LEN2 = GPIO_BASE_SIZE - /* GPIO Community 4 */ CreateDWordField (^RBUF, ^COM4._BAS, BAS4) CreateDWordField (^RBUF, ^COM4._LEN, LEN4) |