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authorRaul E Rangel <rrangel@chromium.org>2022-02-03 15:45:18 -0700
committerRaul Rangel <rrangel@chromium.org>2022-02-08 16:19:11 +0000
commit1597748a80a19ad512265ef0b8a74c69af55c8c3 (patch)
treed61f026cf70bb6089b0e6ac2d4f5901cc5c55d29 /src/soc
parent22ad8f25084bd923a5c0a1d260f5a70db02739c9 (diff)
soc/amd/cezanne: Disable CONSOLE_CBMEM_PRINT_PRE_BOOTBLOCK_CONTENTS
Now that PSP verstage can directly write to the UART, we no longer need to manually dump the cbmem contents. Ideally if we can get picasso to add support for mapping the UART, or if we implement bit banging we can delete this functionality completely. BUG=b:215599230 TEST=Boot guybrush and verify verstage logs aren't printed twice Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Id70b24625c3b2f3d6fe470cf227a0083f5b974f9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61611 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/cezanne/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index f0b7c272d4..19f026676a 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -16,7 +16,6 @@ config SOC_SPECIFIC_OPTIONS
select ARCH_RAMSTAGE_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
- select CONSOLE_CBMEM_PRINT_PRE_BOOTBLOCK_CONTENTS if VBOOT_STARTS_BEFORE_BOOTBLOCK
select DRIVERS_USB_ACPI
select DRIVERS_I2C_DESIGNWARE
select DRIVERS_USB_PCI_XHCI