diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2020-12-08 17:27:30 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-09 18:44:40 +0000 |
| commit | 153f92adbed953c068b09b3ef7d9f5369488c13c (patch) | |
| tree | e5d0826b26a5698f10cf3a344d0330c1f045ea72 /src/soc | |
| parent | 4be064a1d8b3693954c637e578cf3d6aec625105 (diff) | |
soc/amd/cezanne: add basic early FCH initialization to bootblock
Change-Id: I1c6d32a5498a7adcee3c8c3145f85e9dba26bf7e
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48475
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/cezanne/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/cezanne/bootblock.c | 3 | ||||
| -rw-r--r-- | src/soc/amd/cezanne/early_fch.c | 21 | ||||
| -rw-r--r-- | src/soc/amd/cezanne/include/soc/southbridge.h | 3 |
4 files changed, 28 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index df3355e77b..946e48004b 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -5,6 +5,7 @@ ifeq ($(CONFIG_SOC_AMD_CEZANNE),y) all-y += config.c bootblock-y += bootblock.c +bootblock-y += early_fch.c romstage-y += romstage.c diff --git a/src/soc/amd/cezanne/bootblock.c b/src/soc/amd/cezanne/bootblock.c index 7fe9f81e28..8e1bff0fbf 100644 --- a/src/soc/amd/cezanne/bootblock.c +++ b/src/soc/amd/cezanne/bootblock.c @@ -3,6 +3,7 @@ #include <amdblocks/amd_pci_mmconf.h> #include <bootblock_common.h> #include <cpu/x86/tsc.h> +#include <soc/southbridge.h> #include <stdint.h> asmlinkage void bootblock_c_entry(uint64_t base_timestamp) @@ -20,8 +21,10 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp) void bootblock_soc_early_init(void) { + fch_pre_init(); } void bootblock_soc_init(void) { + fch_early_init(); } diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c new file mode 100644 index 0000000000..6616d075b9 --- /dev/null +++ b/src/soc/amd/cezanne/early_fch.c @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/acpimmio.h> +#include <amdblocks/smbus.h> +#include <console/console.h> +#include <soc/southbridge.h> + +/* Before console init */ +void fch_pre_init(void) +{ + enable_acpimmio_decode_pm04(); + fch_smbus_init(); + fch_enable_cf9_io(); + fch_enable_legacy_io(); +} + +/* After console init */ +void fch_early_init(void) +{ + fch_print_pmxc0_status(); +} diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h index 0f26ff0807..2456ebc6f9 100644 --- a/src/soc/amd/cezanne/include/soc/southbridge.h +++ b/src/soc/amd/cezanne/include/soc/southbridge.h @@ -5,4 +5,7 @@ #include <soc/iomap.h> +void fch_pre_init(void); +void fch_early_init(void); + #endif /* AMD_CEZANNE_SOUTHBRIDGE_H */ |