summaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
authorKarthikeyan Ramasubramanian <kramasub@google.com>2022-08-12 12:14:38 -0600
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-08-14 21:08:01 +0000
commit1527a12e0093860c2d9c1ed8515e31c67652a0ad (patch)
tree966c6ba85fe34e5efd74a379d833fcc538fa1ea8 /src/soc
parent865c97c304af61903f3fad7d489db5097255fe11 (diff)
Revert "soc/amd/sabrina: Re-init eSPI in bootblock"
This reverts commit 8b1c6c6cb384c89659abbd043c2566df358d8f95. With updated APCB, eSPI configuration carries over to bootblock. Hence eSPI does not need to be re-initialized in bootblock. BUG=b:241426419 TEST=Build and boot to OS in Skyrim with PSP verstage. Cq-Depend: chrome-internal:4929421 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I426b07329d4a0154d915381c99dcc9746b7a3d7c Reviewed-on: https://review.coreboot.org/c/coreboot/+/66697 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/mendocino/early_fch.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/mendocino/early_fch.c b/src/soc/amd/mendocino/early_fch.c
index dceeade0e3..fe68421949 100644
--- a/src/soc/amd/mendocino/early_fch.c
+++ b/src/soc/amd/mendocino/early_fch.c
@@ -42,9 +42,9 @@ void fch_pre_init(void)
/* Setup SPI base by calling lpc_early_init before setting up eSPI. */
lpc_early_init();
- /* Setup eSPI to enable port80 routing if the board is using eSPI.
- TODO(b/241426419): Setup eSPI if it is not already done in verstage on PSP. */
- if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
+ /* Setup eSPI to enable port80 routing if the board is using eSPI and the eSPI
+ interface hasn't already been set up in verstage on PSP */
+ if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI) && !CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))
configure_espi_with_mb_hook();
fch_spi_early_init();