diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2023-10-21 20:43:40 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-10-23 21:00:03 +0000 |
| commit | 41ce3a57d67429066a4f242fd57e64d5ea8dcdec (patch) | |
| tree | 237958fe6198ec1976cbdb7490fcb648e16e5f79 /src/soc | |
| parent | ea2a47667e88cc68399381f9ec640cd9d74a6b25 (diff) | |
soc/intel/cannonlake: Add ACPI devices for FSPI, SRAM, HEC1
Add ACPI devices for these components so that generated LPI constraints
for them have valid device references.
TEST=tested with rest of patch train
Change-Id: I3b85fec3de8f33d338425a417cc8b0f5290a5e4f
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78520
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/cannonlake/acpi/pcie.asl | 10 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/acpi/serialio.asl | 6 |
2 files changed, 16 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/acpi/pcie.asl b/src/soc/intel/cannonlake/acpi/pcie.asl index 302863baba..21e7925cc0 100644 --- a/src/soc/intel/cannonlake/acpi/pcie.asl +++ b/src/soc/intel/cannonlake/acpi/pcie.asl @@ -521,3 +521,13 @@ Device (RP24) } } #endif + +Device (SRAM) +{ + Name (_ADR, 0x00140002) +} + +Device (CSE1) +{ + Name (_ADR, 0x00160000) +} diff --git a/src/soc/intel/cannonlake/acpi/serialio.asl b/src/soc/intel/cannonlake/acpi/serialio.asl index 0551191271..0d39aaec4e 100644 --- a/src/soc/intel/cannonlake/acpi/serialio.asl +++ b/src/soc/intel/cannonlake/acpi/serialio.asl @@ -77,3 +77,9 @@ Device (UAR2) Name (_DDN, "Serial IO UART Controller 2") } #endif + +Device (FSPI) +{ + Name (_ADR, 0x001f0005) + Name (_DDN, "Fast SPI") +} |