From 41ce3a57d67429066a4f242fd57e64d5ea8dcdec Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sat, 21 Oct 2023 20:43:40 -0500 Subject: soc/intel/cannonlake: Add ACPI devices for FSPI, SRAM, HEC1 Add ACPI devices for these components so that generated LPI constraints for them have valid device references. TEST=tested with rest of patch train Change-Id: I3b85fec3de8f33d338425a417cc8b0f5290a5e4f Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/78520 Reviewed-by: Felix Singer Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/soc/intel/cannonlake/acpi/pcie.asl | 10 ++++++++++ src/soc/intel/cannonlake/acpi/serialio.asl | 6 ++++++ 2 files changed, 16 insertions(+) (limited to 'src/soc') diff --git a/src/soc/intel/cannonlake/acpi/pcie.asl b/src/soc/intel/cannonlake/acpi/pcie.asl index 302863baba..21e7925cc0 100644 --- a/src/soc/intel/cannonlake/acpi/pcie.asl +++ b/src/soc/intel/cannonlake/acpi/pcie.asl @@ -521,3 +521,13 @@ Device (RP24) } } #endif + +Device (SRAM) +{ + Name (_ADR, 0x00140002) +} + +Device (CSE1) +{ + Name (_ADR, 0x00160000) +} diff --git a/src/soc/intel/cannonlake/acpi/serialio.asl b/src/soc/intel/cannonlake/acpi/serialio.asl index 0551191271..0d39aaec4e 100644 --- a/src/soc/intel/cannonlake/acpi/serialio.asl +++ b/src/soc/intel/cannonlake/acpi/serialio.asl @@ -77,3 +77,9 @@ Device (UAR2) Name (_DDN, "Serial IO UART Controller 2") } #endif + +Device (FSPI) +{ + Name (_ADR, 0x001f0005) + Name (_DDN, "Fast SPI") +} -- cgit v1.2.3