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authorFelix Held <felix-coreboot@felixheld.de>2023-02-02 16:13:05 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-02-07 11:01:33 +0000
commit77128a8dcd119b713f755efee64222f2d79217bb (patch)
tree57f42c7f8579dda3d4201772989a492df773c3ec /src/soc/sifive
parent0d34a50a360228138ade623e799b03eaba83b0a5 (diff)
soc/amd/common/data_fabric_helper: normalize addresses in debug print
Instead of just printing the register contents, normalize the contents of the base and limit registers to actual MMIO addresses and then print those. This will hopefully avoid some confusion caused by the shifted addresses. Output on Mandolin before the patch: === Data Fabric MMIO configuration registers === Addresses are shifted to the right by 16 bits. idx control base limit 0 93 fc00 febf 1 93 1000000 ffffffff 2 93 d000 f7ff 3 1093 fed0 fedf 4 90 0 0 5 90 0 0 6 90 0 0 7 90 0 0 Output on Mandolin after the patch: === Data Fabric MMIO configuration registers === idx control base limit 0 93 fc000000 febfffff 1 93 10000000000 ffffffffffff 2 93 d0000000 f7ffffff 3 1093 fed00000 fedfffff 4 90 0 ffff 5 90 0 ffff 6 90 0 ffff 7 90 0 ffff Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I62eeb88ddac6a7a421fccc8e433523459117976a Reviewed-on: https://review.coreboot.org/c/coreboot/+/72739 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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