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authorHuayang Duan <huayang.duan@mediatek.com>2020-06-24 09:11:24 +0800
committerHung-Te Lin <hungte@chromium.org>2021-01-19 01:32:31 +0000
commit68cb9ed0680a8197f0aeedc190eace2ffca62a0a (patch)
treeb93d4a59daccd673945e9fcbcaaba1c26b95b9b0 /src/soc/sifive
parent7ce98830581abd18e3f11b72f08deeadee38241e (diff)
soc/mediatek/mt8192: Save dramc shuffle result after calibration
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Change-Id: Icfd0923d4bd34ebb082e00e87f262b0d908fe342 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44714 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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