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author | Felix Held <felix-coreboot@felixheld.de> | 2022-12-13 17:01:22 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-14 16:05:50 +0000 |
commit | 84429e092f1c80f6e05e9d15f675923eb043352e (patch) | |
tree | 5068d66297a5a2e6c1374a64ea2658454ac7fc41 /src/soc/sifive/fu540/ddrregs.h | |
parent | 4f2b5a5dbd40d6b1561c872a8883b124a8e24008 (diff) |
soc/amd/common/block/lpc/espi_util: make eSPI pin setup failure nonfatal
Improve the eSPI pin configuration setup so that a failure in there
won't call die() and stop booting at this point, but return an error to
the caller so that the rest of the eSPI configuration will be skipped.
This will prevent an early boot failure if the EC is missing or the eSPI
interface is in a non-functional state. Also slightly shorten the
function names so that the code still fits into 96 chars.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ice2d3a791d6a464eff4fb69d02aeca0bfe580be2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70730
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/sifive/fu540/ddrregs.h')
0 files changed, 0 insertions, 0 deletions