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author | Arthur Heymans <arthur@aheymans.xyz> | 2023-07-13 14:34:10 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-10-10 16:01:20 +0000 |
commit | c666a916112aece345da57a0b4f3bafc43234ee7 (patch) | |
tree | 59cfab421bd92ff5635aa651a9062779bc0d3fbf /src/soc/rockchip | |
parent | 4da9d6b41d08e58e0e8a868acd76cedfb1b54586 (diff) |
soc/amd/genoa: Enable eSPI early
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I4965eac4ec3d600b1e840affce4e5b4fa2ea4360
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76508
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/rockchip')
0 files changed, 0 insertions, 0 deletions