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| author | Angel Pons <th3fanbus@gmail.com> | 2020-05-21 00:58:33 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-05-26 11:45:24 +0000 |
| commit | 41b820cbd66da001b02a426a7b5cf1b7f011702a (patch) | |
| tree | 72db6eebdf34554a5d219c17349d4148fca4294e /src/soc/rockchip/rk3399/tsadc.c | |
| parent | 0c983df7caa041f86f28938ccae31ce2d45803e5 (diff) | |
AGESA f14: Factor out default MTRR settings
All AGESA f14 boards use the same MTRR values. Factor them out, while
still allowing a board to override them via BLDCFG.
TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.
Change-Id: Id980e4671e51fe800188f0a84768a307c8965886
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41594
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Diffstat (limited to 'src/soc/rockchip/rk3399/tsadc.c')
0 files changed, 0 insertions, 0 deletions