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authorLin Huang <hl@rock-chips.com>2017-10-30 17:40:19 +0800
committerJulius Werner <jwerner@chromium.org>2017-11-28 19:14:32 +0000
commit2e3ebb604a64d19641c6ebf387fd1535c08baea4 (patch)
treecca8a351c59c88488dcc127722063259b9357ba0 /src/soc/rockchip/rk3399/include
parentecd600a0caa18b0346e4b8024aae2263db0d7821 (diff)
rockchip/rk3399: mipi: correct phy parameter setting
As MIPI PHY document show, icpctrl<3..0> and lpfctrl<5..0> should depend on frequency, so fix it. Change-Id: Ic4a90767bd1f22d5d784d4013dc7afb3149115c1 Signed-off-by: Lin Huang <hl@rock-chips.com> Reviewed-on: https://review.coreboot.org/22467 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/rockchip/rk3399/include')
-rw-r--r--src/soc/rockchip/rk3399/include/soc/mipi.h23
1 files changed, 19 insertions, 4 deletions
diff --git a/src/soc/rockchip/rk3399/include/soc/mipi.h b/src/soc/rockchip/rk3399/include/soc/mipi.h
index bccaf287d3..077e05ef42 100644
--- a/src/soc/rockchip/rk3399/include/soc/mipi.h
+++ b/src/soc/rockchip/rk3399/include/soc/mipi.h
@@ -186,10 +186,23 @@ check_member(rk_mipi_regs, dsi_int_msk1, 0xc8);
#define VCO_IN_CAP_CON_HIGH (0x2 << 1)
#define REF_BIAS_CUR_SEL BIT(0)
-#define CP_CURRENT_3MA BIT(3)
+#define CP_CURRENT_1_5UA 0x0
+#define CP_CURRENT_3UA 0x1
+#define CP_CURRENT_4_5UA 0x2
+#define CP_CURRENT_7_5UA 0x6
+#define CP_CURRENT_6UA 0x9
+#define CP_CURRENT_12UA 0xb
+#define CP_CURRENT_SEL(val) ((val) & 0xf)
+
#define CP_PROGRAM_EN BIT(7)
+
#define LPF_PROGRAM_EN BIT(6)
-#define LPF_RESISTORS_20_KOHM 0
+#define LPF_RESISTORS_15_5KOHM 0x1
+#define LPF_RESISTORS_13KOHM 0x2
+#define LPF_RESISTORS_11_5KOHM 0x4
+#define LPF_RESISTORS_10_5KOHM 0x8
+#define LPF_RESISTORS_8KOHM 0x10
+#define LPF_RESISTORS_SEL(val) ((val) & 0x3f)
#define HSFREQRANGE_SEL(val) (((val) & 0x3f) << 1)
@@ -271,9 +284,11 @@ enum {
MIPI_DCS_SET_DISPLAY_ON = 0x29,
};
-struct dphy_pll_testdin_map {
+struct dphy_pll_parameter_map {
unsigned int max_mbps;
- u8 testdin;
+ u8 hsfreqrange;
+ u8 icpctrl;
+ u8 lpfctrl;
};
struct rk_mipi_dsi {