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authorShunqian Zheng <zhengsq@rock-chips.com>2016-05-04 16:21:36 +0800
committerMartin Roth <martinroth@google.com>2016-06-03 18:08:10 +0200
commitd1cec75ce8b69d3e90bc2189dd0b1af329ea8cce (patch)
tree838b597c3104da52e62745d1ab706f954d6f6164 /src/soc/rockchip/rk3399/chip.h
parente747b7473eca356f1ef388bef04d2b354ec46ab5 (diff)
rockchip: rk3399: initialize display for eDP
This patch adds functions to init the display. To set up the display, initialize the eDP and read the EDID. Based on these, we then set the clock for VOP, and finally enable VOP and backlight. For a mainboard, it should set the vop_id, vop_mode and framebuffer_bits_per_pixel in devicetree.cb. For VOP_MODE_AUTO_DETECT, it will try eDP first and then HDMI (which is not supported yet). EDIT: Updated Makefile to only build in new files if MAINBOARD_DO_NATIVE_VGA_INIT is enabled. All of these platforms should have it enabled, so this shouldn't make any difference except now, before the platform code is in place. BRANCH=none BUG=chrome-os-partner:51537 TEST=test with the other patch Change-Id: If935415026c945ab6ee128bd6bbdd792890aa24a Signed-off-by: Martin Roth <martinroth@google.com> Original-Commit-Id: c1020cc806775629f4d5dc57bd805a9a12169386 Original-Change-Id: Ic32d0a251cb8e08aa5f0b15b2c06c4e02c08a761 Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/342336 Original-Commit-Ready: Vadim Bendebury <vbendeb@chromium.org> Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-by: Shunqian Zheng <zhengsq@rock-chips.com> Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/14857 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/rockchip/rk3399/chip.h')
-rw-r--r--src/soc/rockchip/rk3399/chip.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3399/chip.h b/src/soc/rockchip/rk3399/chip.h
new file mode 100644
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+++ b/src/soc/rockchip/rk3399/chip.h
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Rockchip Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_ROCKCHIP_RK3399_CHIP_H__
+#define __SOC_ROCKCHIP_RK3399_CHIP_H__
+
+#include <soc/gpio.h>
+#include <soc/vop.h> /* for vop_modes enum used in devicetree.cb */
+
+struct soc_rockchip_rk3399_config {
+ u32 vop_id;
+ gpio_t lcd_bl_pwm_gpio;
+ gpio_t lcd_bl_en_gpio;
+ u32 bl_power_on_udelay;
+ u32 bl_pwm_to_enable_udelay;
+ u32 framebuffer_bits_per_pixel;
+ u32 vop_mode;
+};
+
+#endif /* __SOC_ROCKCHIP_RK3399_CHIP_H__ */