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authorElyes HAOUAS <ehaouas@noos.fr>2020-02-20 18:20:57 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-02-24 13:04:02 +0000
commit8d1b0f1dbd2736391d4011106527a1e5b286307d (patch)
tree494ff06c2a0f8bd0c5c189dcdcbcebfc12f9749c /src/soc/rockchip/rk3288
parent23e3f9d6ed4f841f0c5222a2aa2cb586f2210d95 (diff)
soc/rockchip: Fix typos
Change-Id: I85ccb9e1458340bd5bc2a0eb9abed8d0eeb2fe65 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39028 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/rockchip/rk3288')
-rw-r--r--src/soc/rockchip/rk3288/hdmi.c2
-rw-r--r--src/soc/rockchip/rk3288/tsadc.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/rockchip/rk3288/hdmi.c b/src/soc/rockchip/rk3288/hdmi.c
index cd9890bc9b..36a08a9000 100644
--- a/src/soc/rockchip/rk3288/hdmi.c
+++ b/src/soc/rockchip/rk3288/hdmi.c
@@ -733,7 +733,7 @@ static int hdmi_read_edid(int block, u8 *buff)
u32 trytime = 5;
u32 n, j, val;
- /* set ddc i2c clk which devided from ddc_clk to 100khz */
+ /* set ddc i2c clk which derived from ddc_clk to 100kHz */
write32(&hdmi_regs->i2cm_ss_scl_hcnt_0_addr, 0x7a);
write32(&hdmi_regs->i2cm_ss_scl_lcnt_0_addr, 0x8d);
clrsetbits32(&hdmi_regs->i2cm_div, HDMI_I2CM_DIV_FAST_STD_MODE,
diff --git a/src/soc/rockchip/rk3288/tsadc.c b/src/soc/rockchip/rk3288/tsadc.c
index de3d0580ff..7a1e34d4a3 100644
--- a/src/soc/rockchip/rk3288/tsadc.c
+++ b/src/soc/rockchip/rk3288/tsadc.c
@@ -100,7 +100,7 @@ void tsadc_init(void)
/*
tsadc iomux must be set after the tshut polarity setting,
- since the tshut polarity defalut low active,
+ since the tshut polarity default low active,
so if you enable tsadc iomux,it will output high
*/
setbits32(&rk3288_pmu->iomux_tsadc_int, IOMUX_TSADC_INT);