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authorYidi Lin <yidilin@chromium.org>2023-10-31 17:15:50 +0800
committerMartin L Roth <gaumless@gmail.com>2023-11-04 17:06:42 +0000
commit2751d2922f7c87a6acf901a0008ac131bf7245db (patch)
tree283504f4bf98e0b2331c8d8c501dd0abfe280369 /src/soc/rockchip/rk3288
parent909c317b2deb184d95c7d289cbe6603e209ed72d (diff)
Use common GCD function
Change-Id: I30e4b02a9ca6a15c9bc4edcf4143ffa13a21a732 Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78799 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/soc/rockchip/rk3288')
-rw-r--r--src/soc/rockchip/rk3288/clock.c15
1 files changed, 3 insertions, 12 deletions
diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c
index c2f93f5854..d52fa2a858 100644
--- a/src/soc/rockchip/rk3288/clock.c
+++ b/src/soc/rockchip/rk3288/clock.c
@@ -1,9 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <device/mmio.h>
#include <assert.h>
+#include <commonlib/bsd/gcd.h>
#include <console/console.h>
#include <delay.h>
+#include <device/mmio.h>
#include <lib.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
@@ -438,16 +439,6 @@ void rkclk_configure_spi(unsigned int bus, unsigned int hz)
}
}
-static u32 clk_gcd(u32 a, u32 b)
-{
- while (b != 0) {
- int r = b;
- b = a % b;
- a = r;
- }
- return a;
-}
-
void rkclk_configure_i2s(unsigned int hz)
{
int n, d;
@@ -462,7 +453,7 @@ void rkclk_configure_i2s(unsigned int hz)
1 << 15 | 0 << 12 | 1 << 8 | 0 << 0));
/* set frac divider */
- v = clk_gcd(GPLL_HZ, hz);
+ v = gcd32(GPLL_HZ, hz);
n = (GPLL_HZ / v) & (0xffff);
d = (hz / v) & (0xffff);
assert(hz == GPLL_HZ / n * d);