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authorCasper Chang <casper_chang@wistron.corp-partner.google.com>2021-09-22 22:35:54 -0400
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-09-24 15:27:43 +0000
commit8fcefd3f6f4991f3b6037f389e0252895a3ec03f (patch)
tree9d26665fbe70cb4b8b4a6c117211e4c70a8ffdcc /src/soc/rockchip/rk3288/timer.c
parent28e2945ab1ea5c4bfc5259442c29a76e17bc330d (diff)
soc/intel/alderlake: add MaxDramSpeed config
This change add MaxDramSpeed for variants usage to config dram speed. Signed-off-by: Casper Chang <casper_chang@wistron.corp-partner.google.com> Change-Id: Iba0fae0ab4ff0121dc63af792458492eeb21ec2b Reviewed-on: https://review.coreboot.org/c/coreboot/+/57866 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/rockchip/rk3288/timer.c')
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