summaryrefslogtreecommitdiff
path: root/src/soc/rockchip/rk3288/include
diff options
context:
space:
mode:
authorJulius Werner <jwerner@chromium.org>2016-05-02 13:06:08 -0700
committerPatrick Georgi <pgeorgi@google.com>2016-05-09 08:50:49 +0200
commit55b66454951a56a3504eee66833445bc937b4ca8 (patch)
tree48a5e8f48328f8ccde51fe4325b49997ef893bb9 /src/soc/rockchip/rk3288/include
parent591298a575d6815346c312bb5254f77abef56fb8 (diff)
rockchip/rk3288: Shuffle memlayout to make it fit
Another day, another overflowing RK3288 stage. There's almost 2K of space left in verstage/romstage (*gasp*, such waste!), so let's move one of them over to the bootblock. (We now have no whole kilobyte left that I can see...) BRANCH=None BUG=chromium:608439 TEST=Built Jerry Change-Id: Ice51d73ec0d89bcb1c927046be95630f177469c5 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: fb7a101daba4f4f899a9c907b29d908661aa2dae Original-Change-Id: Ib72c0b3718aac38bc97c898a74aa5757e46cef0b Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/341742 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://review.coreboot.org/14730 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/rk3288/include')
-rw-r--r--src/soc/rockchip/rk3288/include/soc/memlayout.ld8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/rockchip/rk3288/include/soc/memlayout.ld b/src/soc/rockchip/rk3288/include/soc/memlayout.ld
index 7394fbe848..daff503598 100644
--- a/src/soc/rockchip/rk3288/include/soc/memlayout.ld
+++ b/src/soc/rockchip/rk3288/include/soc/memlayout.ld
@@ -30,10 +30,10 @@ SECTIONS
SRAM_START(0xFF700000)
TTB(0xFF700000, 16K)
- BOOTBLOCK(0xFF704004, 18K - 4)
- PRERAM_CBMEM_CONSOLE(0xFF708800, 4K)
- VBOOT2_WORK(0xFF709800, 12K)
- OVERLAP_VERSTAGE_ROMSTAGE(0xFF70C800, 41K)
+ BOOTBLOCK(0xFF704004, 19K - 4)
+ PRERAM_CBMEM_CONSOLE(0xFF708C00, 4K)
+ VBOOT2_WORK(0xFF709C00, 12K)
+ OVERLAP_VERSTAGE_ROMSTAGE(0xFF70CC00, 40K)
TTB_SUBTABLES(0xFF716C00, 1K)
PRERAM_CBFS_CACHE(0xFF717000, 1K)
TIMESTAMP(0xFF717400, 0x180)