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authorhuang lin <hl@rock-chips.com>2015-01-23 16:41:20 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-04-15 22:13:40 +0200
commitc14e42623bede2480284cf500362d545f85f8f69 (patch)
treecd146330cfb5596578c1e85d77b06d001dec1dd4 /src/soc/rockchip/rk3288/edp.c
parent1cd2e76f2a7b6e95af8d4f40cd3ee7f5180b8466 (diff)
rk3288: support edp HPD function
we use the delay 200ms to meet the edp power timing request before, it waste time, so we use the HPD function to detect the edp panel now. In previous version, the hardware may not support the edp HPD function, so in the code it will spend 200ms to detect hpd single, if it don't get the hpd single, it will contiue the edp initialization process, to compatible all of the hardware version. BUG=chrome-os-partner:35623 TEST=Boot from Mighty, and display normal BRANCH=None Change-Id: I82c6a80e37fa42eef3521e6ebbf190d7e80fcece Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 7a5343eb9af12cae9a15284217762a91ae24bac6 Original-Change-Id: I21c0ef6ce4643e90a192d8b86659264895b5fda9 Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/242792 Original-Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-on: http://review.coreboot.org/9659 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/rockchip/rk3288/edp.c')
-rw-r--r--src/soc/rockchip/rk3288/edp.c45
1 files changed, 45 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3288/edp.c b/src/soc/rockchip/rk3288/edp.c
index 7b69ce8d2d..3f27195199 100644
--- a/src/soc/rockchip/rk3288/edp.c
+++ b/src/soc/rockchip/rk3288/edp.c
@@ -938,6 +938,49 @@ static int rk_edp_config_video(struct rk_edp *edp)
return rk_edp_is_video_stream_on(edp);
}
+static void rockchip_edp_force_hpd(struct rk_edp *edp)
+{
+ u32 val;
+
+ val = readl(&edp->regs->sys_ctl_3);
+ val |= (F_HPD | HPD_CTRL);
+ writel(val, &edp->regs->sys_ctl_3);
+}
+
+static int rockchip_edp_get_plug_in_status(struct rk_edp *edp)
+{
+ u32 val;
+
+ val = readl(&edp->regs->sys_ctl_3);
+ if (val & HPD_STATUS)
+ return 1;
+
+ return 0;
+}
+
+/*
+ * support edp HPD function
+ * some hardware version do not support edp hdp,
+ * we use 200ms to try to get the hpd single now,
+ * if we can not get edp hpd single, it will delay 200ms,
+ * also meet the edp power timing request, to compatible
+ * all of the hardware version
+ */
+static void rockchip_edp_wait_hpd(struct rk_edp *edp)
+{
+ struct stopwatch hpd;
+
+ stopwatch_init_msecs_expire(&hpd, 200);
+ do {
+ if (rockchip_edp_get_plug_in_status(edp))
+ return;
+ udelay(100);
+ } while (!stopwatch_expired(&hpd));
+
+ printk(BIOS_DEBUG, "do not get hpd single, force hpd\n");
+ rockchip_edp_force_hpd(edp);
+}
+
int rk_edp_get_edid(struct edid *edid)
{
int i;
@@ -983,6 +1026,8 @@ void rk_edp_init(u32 vop_id)
val = (vop_id == 1) ? RK_SETBITS(1 << 5) : RK_CLRBITS(1 << 5);
writel(val, &rk3288_grf->soc_con6);
+ rockchip_edp_wait_hpd(&rk_edp);
+
rk_edp_init_refclk(&rk_edp);
rk_edp_init_interrupt(&rk_edp);
rk_edp_enable_sw_function(&rk_edp);