diff options
| author | huang lin <hl@rock-chips.com> | 2014-10-14 10:04:16 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-08 09:28:46 +0200 |
| commit | a97bd5a4c80faac0ea47eced594c8184a3f3fdcc (patch) | |
| tree | c1a0d69e749cf601ff462bb47b890445fc4129a9 /src/soc/rockchip/rk3288/clock.c | |
| parent | 2d3d452d521db352b9f9a978314a997d3dee5bd6 (diff) | |
rk3288: support tsadc
check the cpu and gpu temperature in romstage,
if over 120 degrees celsius,shut down the device.
BUG=None
Test=Boot on veyron_pinky rev2, write value
3421(125 celsius) to grf_tsadc_testbitl register,
the device will be shut down
Change-Id: I275d643ce8560444a9b42ee566d5fd63ebcda35e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e0c597489dc0637ffa66ee9db0c4f60757f8889f
Original-Change-Id: If406d6a4f6201150f52ea7fc64cd50b45778d7aa
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/223259
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9348
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/rk3288/clock.c')
| -rw-r--r-- | src/soc/rockchip/rk3288/clock.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c index bdfe079556..5ad431cc33 100644 --- a/src/soc/rockchip/rk3288/clock.c +++ b/src/soc/rockchip/rk3288/clock.c @@ -480,3 +480,14 @@ void rkclk_configure_i2s(unsigned int hz) assert(hz == GPLL_HZ / n * d); writel(d << 16 | n, &cru_ptr->cru_clksel_con[8]); } + +void rkclk_configure_tsadc(unsigned int hz) +{ + u32 div; + u32 src_clk = 32 * KHz; /* tsadc source clock is 32KHz*/ + + div = src_clk / hz; + assert((div - 1 < 64) && (div * hz == 32 * KHz)); + writel(RK_CLRSETBITS(0x3f << 0, (div - 1) << 0), + &cru_ptr->cru_clksel_con[2]); +} |