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author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-02-15 16:30:16 +0100 |
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committer | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-02-23 07:45:33 +0000 |
commit | 425e421e8c58f600a534e0850bcfa80dbd2d2cac (patch) | |
tree | ab9eb52063305021ea6d67258293e68a02cac2e8 /src/soc/rockchip/common | |
parent | 9fa4048e2deccd63d0e225152ae6a06e8c767865 (diff) |
soc/intel/xeon_sp: Locate PCI devices by Ven/Dev ID
Since the ACPI code is looking for VtdBars, that only appear on
Vtd devices, search for the Vtd device in devicetree.
With the previous commit the VtdBar is now exposed as a resource
on the Vtd device and thus can easily be accessed and used.
Drop the FSP HOB parsing and just use coreboot native functions.
Allows the code to work with multiple PCI segment groups.
Change-Id: I2c752dc595ac4c901f2b3a96718e256e413c76a7
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80551
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Diffstat (limited to 'src/soc/rockchip/common')
0 files changed, 0 insertions, 0 deletions