diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-12-02 22:03:27 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-04 14:11:17 +0000 |
| commit | 55009af42c39f413c49503670ce9bc2858974962 (patch) | |
| tree | 099e9728bfe8066999de4d7a30021eb10bd71d12 /src/soc/rockchip/common/vop.c | |
| parent | 1c371572188a90ea16275460dd4ab6bf9966350b (diff) | |
Change all clrsetbits_leXX() to clrsetbitsXX()
This patch changes all existing instances of clrsetbits_leXX() to the
new endian-independent clrsetbitsXX(), after double-checking that
they're all in SoC-specific code operating on CPU registers and not
actually trying to make an endian conversion.
This patch was created by running
sed -i -e 's/\([cs][le][rt]bits\)_le\([136][624]\)/\1\2/g'
across the codebase and cleaning up formatting a bit.
Change-Id: I7fc3e736e5fe927da8960fdcd2aae607b62b5ff4
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/rockchip/common/vop.c')
| -rw-r--r-- | src/soc/rockchip/common/vop.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/src/soc/rockchip/common/vop.c b/src/soc/rockchip/common/vop.c index 9c70b78171..6e0ce4086c 100644 --- a/src/soc/rockchip/common/vop.c +++ b/src/soc/rockchip/common/vop.c @@ -60,7 +60,7 @@ void rkvop_prepare(u32 vop_id, const struct edid *edid) write32(&preg->win0_dsp_info, V_DSP_WIDTH(hactive - 1) | V_DSP_HEIGHT(vactive - 1)); - clrsetbits_le32(&preg->win0_color_key, M_WIN0_KEY_EN | M_WIN0_KEY_COLOR, + clrsetbits32(&preg->win0_color_key, M_WIN0_KEY_EN | M_WIN0_KEY_COLOR, V_WIN0_KEY_EN(0) | V_WIN0_KEY_COLOR(0)); @@ -89,10 +89,10 @@ void rkvop_prepare(u32 vop_id, const struct edid *edid) else lb_mode = LB_RGB_1280X8; - clrsetbits_le32(&preg->win0_ctrl0, - M_WIN0_LB_MODE | M_WIN0_DATA_FMT | M_WIN0_EN, - V_WIN0_LB_MODE(lb_mode) | - V_WIN0_DATA_FMT(rgb_mode) | V_WIN0_EN(1)); + clrsetbits32(&preg->win0_ctrl0, + M_WIN0_LB_MODE | M_WIN0_DATA_FMT | M_WIN0_EN, + V_WIN0_LB_MODE(lb_mode) | + V_WIN0_DATA_FMT(rgb_mode) | V_WIN0_EN(1)); } void rkvop_mode_set(u32 vop_id, const struct edid *edid, u32 mode) @@ -111,34 +111,34 @@ void rkvop_mode_set(u32 vop_id, const struct edid *edid, u32 mode) switch (mode) { case VOP_MODE_HDMI: - clrsetbits_le32(&preg->sys_ctrl, - M_ALL_OUT_EN, V_HDMI_OUT_EN(1)); + clrsetbits32(&preg->sys_ctrl, + M_ALL_OUT_EN, V_HDMI_OUT_EN(1)); dsp_out_mode = 15; break; case VOP_MODE_MIPI: - clrsetbits_le32(&preg->sys_ctrl, M_ALL_OUT_EN, - V_MIPI_OUT_EN(1)); + clrsetbits32(&preg->sys_ctrl, M_ALL_OUT_EN, + V_MIPI_OUT_EN(1)); dsp_out_mode = 0; break; case VOP_MODE_DUAL_MIPI: - clrsetbits_le32(&preg->sys_ctrl, M_ALL_OUT_EN, - V_MIPI_OUT_EN(1) | V_DUAL_MIPI_EN(1)); + clrsetbits32(&preg->sys_ctrl, M_ALL_OUT_EN, + V_MIPI_OUT_EN(1) | V_DUAL_MIPI_EN(1)); dsp_out_mode = 0; break; case VOP_MODE_EDP: default: - clrsetbits_le32(&preg->sys_ctrl, - M_ALL_OUT_EN, V_EDP_OUT_EN(1)); + clrsetbits32(&preg->sys_ctrl, + M_ALL_OUT_EN, V_EDP_OUT_EN(1)); dsp_out_mode = 15; break; } - clrsetbits_le32(&preg->dsp_ctrl0, - M_DSP_OUT_MODE | M_DSP_VSYNC_POL | - M_DSP_HSYNC_POL, - V_DSP_OUT_MODE(dsp_out_mode) | - V_DSP_HSYNC_POL(edid->mode.phsync == '+') | - V_DSP_VSYNC_POL(edid->mode.pvsync == '+')); + clrsetbits32(&preg->dsp_ctrl0, + M_DSP_OUT_MODE | M_DSP_VSYNC_POL | + M_DSP_HSYNC_POL, + V_DSP_OUT_MODE(dsp_out_mode) | + V_DSP_HSYNC_POL(edid->mode.phsync == '+') | + V_DSP_VSYNC_POL(edid->mode.pvsync == '+')); write32(&preg->dsp_htotal_hs_end, V_HSYNC(hsync_len) | V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch)); |