diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-12-02 22:03:27 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-04 14:11:17 +0000 |
| commit | 55009af42c39f413c49503670ce9bc2858974962 (patch) | |
| tree | 099e9728bfe8066999de4d7a30021eb10bd71d12 /src/soc/qualcomm/sc7180 | |
| parent | 1c371572188a90ea16275460dd4ab6bf9966350b (diff) | |
Change all clrsetbits_leXX() to clrsetbitsXX()
This patch changes all existing instances of clrsetbits_leXX() to the
new endian-independent clrsetbitsXX(), after double-checking that
they're all in SoC-specific code operating on CPU registers and not
actually trying to make an endian conversion.
This patch was created by running
sed -i -e 's/\([cs][le][rt]bits\)_le\([136][624]\)/\1\2/g'
across the codebase and cleaning up formatting a bit.
Change-Id: I7fc3e736e5fe927da8960fdcd2aae607b62b5ff4
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/qualcomm/sc7180')
| -rw-r--r-- | src/soc/qualcomm/sc7180/gpio.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/qualcomm/sc7180/gpio.c b/src/soc/qualcomm/sc7180/gpio.c index 9f3b722e31..ad89f85011 100644 --- a/src/soc/qualcomm/sc7180/gpio.c +++ b/src/soc/qualcomm/sc7180/gpio.c @@ -13,9 +13,9 @@ * GNU General Public License for more details. */ -#include <arch/mmio.h> #include <assert.h> #include <delay.h> +#include <device/mmio.h> #include <timer.h> #include <timestamp.h> #include <types.h> @@ -86,9 +86,9 @@ void gpio_input_irq(gpio_t gpio, enum gpio_irq_type type, uint32_t pull) gpio_configure(gpio, GPIO_FUNC_GPIO, pull, GPIO_2MA, GPIO_OUTPUT_DISABLE); - clrsetbits_le32(®s->intr_cfg, GPIO_INTR_DECT_CTL_MASK << + clrsetbits32(®s->intr_cfg, GPIO_INTR_DECT_CTL_MASK << GPIO_INTR_DECT_CTL_SHIFT, type << GPIO_INTR_DECT_CTL_SHIFT); - clrsetbits_le32(®s->intr_cfg, GPIO_INTR_RAW_STATUS_ENABLE + clrsetbits32(®s->intr_cfg, GPIO_INTR_RAW_STATUS_ENABLE << GPIO_INTR_RAW_STATUS_EN_SHIFT, GPIO_INTR_RAW_STATUS_ENABLE << GPIO_INTR_RAW_STATUS_EN_SHIFT); } |