diff options
| author | David Hendricks <ddaveh@amazon.com> | 2023-02-19 22:41:57 -0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-03-19 00:54:05 +0000 |
| commit | 97117dbace0cbef694494be0a2695dc153720928 (patch) | |
| tree | ebc0ce0cecbd33f9ca454a47575515e074489e85 /src/soc/qualcomm/sc7180/memlayout.ld | |
| parent | b77ea4c54aaffc8ab1016f79696c6defe0db472f (diff) | |
soc/intel/xeon_sp: add MSR definitions for SPR-SP
Some MSRs used in SPR code are common among currently supported
Xeon-SP generations and are added to the top-level Xeon-SP msr.h. MSRs
which have changed are added to SPR's soc_msr.h.
Signed-off-by: Jonathan Zhang <jonzhang@meta.com>
Signed-off-by: David Hendricks <ddaveh@amazon.com>
Change-Id: I92b433a9686734716dc7936895fb79c7751f7f9b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73172
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jon.zhixiong.zhang@gmail.com>
Diffstat (limited to 'src/soc/qualcomm/sc7180/memlayout.ld')
0 files changed, 0 insertions, 0 deletions