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authorElyes Haouas <ehaouas@noos.fr>2024-03-23 15:13:55 +0100
committerElyes Haouas <ehaouas@noos.fr>2024-03-30 07:44:06 +0000
commit44772b29b09fcebe2bd1b392c9dd2c652b3f64d2 (patch)
treeff818a2e13ee2f506c704c9769b64d76ca63de20 /src/soc/qualcomm/qcs405
parent43225cbdfadca1054d95da901e23c53aa363272a (diff)
soc/qualcomm: Remove blank lines before '}' and after '{'
Change-Id: If2c2138ed3dc437b924297330805caa8c357853d Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81460 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/qcs405')
-rw-r--r--src/soc/qualcomm/qcs405/clock.c4
-rw-r--r--src/soc/qualcomm/qcs405/qup.c1
-rw-r--r--src/soc/qualcomm/qcs405/soc.c1
-rw-r--r--src/soc/qualcomm/qcs405/spi.c1
4 files changed, 0 insertions, 7 deletions
diff --git a/src/soc/qualcomm/qcs405/clock.c b/src/soc/qualcomm/qcs405/clock.c
index ce846543dc..a3a41c739b 100644
--- a/src/soc/qualcomm/qcs405/clock.c
+++ b/src/soc/qualcomm/qcs405/clock.c
@@ -144,7 +144,6 @@ static bool clock_is_off(void *cbcr_addr)
static int clock_enable_vote(void *cbcr_addr, void *vote_addr,
uint32_t vote_bit)
{
-
/* Set clock vote bit */
setbits32(vote_addr, BIT(vote_bit));
@@ -156,7 +155,6 @@ static int clock_enable_vote(void *cbcr_addr, void *vote_addr,
static int clock_enable(void *cbcr_addr)
{
-
/* Set clock enable bit */
setbits32(cbcr_addr, BIT(CLK_CTL_CBC_CLK_EN_SHFT));
@@ -169,7 +167,6 @@ static int clock_enable(void *cbcr_addr)
static int clock_disable(void *cbcr_addr)
{
-
/* Set clock enable bit */
clrbits32(cbcr_addr, BIT(CLK_CTL_CBC_CLK_EN_SHFT));
return 0;
@@ -303,7 +300,6 @@ void clock_disable_spi(int blsp, int qup)
clock_enable(&gcc->blsp2_qup0_spi_apps_cbcr);
else
printk(BIOS_ERR, "BLSP%d not supported\n", blsp);
-
}
void clock_enable_i2c(void)
diff --git a/src/soc/qualcomm/qcs405/qup.c b/src/soc/qualcomm/qcs405/qup.c
index e3a4e5e69e..b5805b046e 100644
--- a/src/soc/qualcomm/qcs405/qup.c
+++ b/src/soc/qualcomm/qcs405/qup.c
@@ -235,7 +235,6 @@ static qup_return_t qup_i2c_write_fifo(blsp_qup_id_t id, qup_data_t *p_tx_obj,
stopwatch_init_usecs_expire(&timeout, CONFIG_I2C_TRANSFER_TIMEOUT_US);
while (data_len) {
-
tag = qup_i2c_create_output_tag(data_len == 1 && stop_seq,
data_ptr[idx]);
data_len--;
diff --git a/src/soc/qualcomm/qcs405/soc.c b/src/soc/qualcomm/qcs405/soc.c
index 18bf698d5a..c53cbf2b84 100644
--- a/src/soc/qualcomm/qcs405/soc.c
+++ b/src/soc/qualcomm/qcs405/soc.c
@@ -13,7 +13,6 @@ static void soc_read_resources(struct device *dev)
static void soc_init(struct device *dev)
{
-
}
static struct device_operations soc_ops = {
diff --git a/src/soc/qualcomm/qcs405/spi.c b/src/soc/qualcomm/qcs405/spi.c
index 48631884c7..b263d2fae9 100644
--- a/src/soc/qualcomm/qcs405/spi.c
+++ b/src/soc/qualcomm/qcs405/spi.c
@@ -403,7 +403,6 @@ static int check_fifo_status(void *reg_addr)
static void enable_io_config(struct qcs_spi_slave *ds,
uint32_t write_cnt, uint32_t read_cnt)
{
-
if (write_cnt) {
clrsetbits32(ds->regs->qup_config,
QUP_CONF_OUTPUT_MSK, QUP_CONF_OUTPUT_ENA);