diff options
| author | Furquan Shaikh <furquan@google.com> | 2014-04-10 20:35:05 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-11-13 06:28:46 +0100 |
| commit | 9d91aba2861a38f0ab99d96d0f53de9a2c73df2d (patch) | |
| tree | 66adb95833e23146517d75ea93359b4c95e5c92d /src/soc/qualcomm/ipq806x/include | |
| parent | d551e82beb3b7ca58996a41ddc22ce3fc19dd225 (diff) | |
ipq806x: Add support for GPIO operations
Basic support for ipq806x GPIO CFG and IO reg operations
Reference: IPQ806x PRM, u-boot arch-ipq806x/gpio.*
BUG=None
BRANCH=None
TEST=Compiled successfully
Original-Change-Id: Ia0a9f288de3ac7bdb1cd4acbf44ba46af4dcc4e2
Original-Reviewed-on: https://chromium-review.googlesource.com/194217
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 0b48e6655e63b467fe79d52149be01d23a2a3712)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I09e222f35b4b20c8eb901f33cf4451085c4c99cc
Reviewed-on: http://review.coreboot.org/7266
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/soc/qualcomm/ipq806x/include')
| -rw-r--r-- | src/soc/qualcomm/ipq806x/include/gpio.h | 44 | ||||
| -rw-r--r-- | src/soc/qualcomm/ipq806x/include/iomap.h | 8 |
2 files changed, 41 insertions, 11 deletions
diff --git a/src/soc/qualcomm/ipq806x/include/gpio.h b/src/soc/qualcomm/ipq806x/include/gpio.h index e2b281e04f..678da0dcae 100644 --- a/src/soc/qualcomm/ipq806x/include/gpio.h +++ b/src/soc/qualcomm/ipq806x/include/gpio.h @@ -30,8 +30,10 @@ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __PLATFORM_AKRONITE_GPIO_H_ -#define __PLATFORM_AKRONITE_GPIO_H_ +#ifndef __SOC_QUALCOMM_IPQ806X_GPIO_H_ +#define __SOC_QUALCOMM_IPQ806X_GPIO_H_ + +typedef unsigned int gpio_t; /* GPIO TLMM: Direction */ #define GPIO_INPUT 0 @@ -57,7 +59,37 @@ #define GPIO_ENABLE 0 #define GPIO_DISABLE 1 -void gpio_tlmm_config(unsigned int gpio, unsigned int func, - unsigned int dir, unsigned int pull, - unsigned int drvstr, unsigned int enable); -#endif +/* GPIO MAX Valid # */ +#define GPIO_MAX_NUM 68 + +/* GPIO TLMM: Mask */ +#define GPIO_CFG_PULL_MASK 0x3 +#define GPIO_CFG_FUNC_MASK 0xF +#define GPIO_CFG_DRV_MASK 0x7 +#define GPIO_CFG_OE_MASK 0x1 + +/* GPIO TLMM: Shift */ +#define GPIO_CFG_PULL_SHIFT 0 +#define GPIO_CFG_FUNC_SHIFT 2 +#define GPIO_CFG_DRV_SHIFT 6 +#define GPIO_CFG_OE_SHIFT 9 + +/* GPIO IO: Mask */ +#define GPIO_IO_IN_MASK 0x1 +#define GPIO_IO_OUT_MASK 0x1 + +/* GPIO IO: Shift */ +#define GPIO_IO_IN_SHIFT 0 +#define GPIO_IO_OUT_SHIFT 1 + +void gpio_tlmm_config_set(gpio_t gpio, unsigned int func, + unsigned int pull, unsigned int drvstr, + unsigned int enable); + +void gpio_tlmm_config_get(gpio_t gpio, unsigned int *func, + unsigned int *pull, unsigned int *drvstr, + unsigned int *enable); + +void gpio_io_config_set(gpio_t gpio, unsigned int out); +void gpio_io_config_get(gpio_t gpio, unsigned int *in, unsigned int *out); +#endif // __SOC_QUALCOMM_IPQ806X_GPIO_H_ diff --git a/src/soc/qualcomm/ipq806x/include/iomap.h b/src/soc/qualcomm/ipq806x/include/iomap.h index a7066af507..5fcfde9ee7 100644 --- a/src/soc/qualcomm/ipq806x/include/iomap.h +++ b/src/soc/qualcomm/ipq806x/include/iomap.h @@ -33,10 +33,8 @@ * SUCH DAMAGE. */ -#ifndef _PLATFORM_MSM8960_IOMAP_H_ -#define _PLATFORM_MSM8960_IOMAP_H_ - -#include <configs/ipq806x_cdp.h> +#ifndef __SOC_QUALCOMM_IPQ806X_IOMAP_H_ +#define __SOC_QUALCOMM_IPQ806X_IOMAP_H_ /* Typecast to allow integers being passed as address This needs to be included because vendor code is not compliant with our @@ -96,4 +94,4 @@ #define UART2_DM_BASE 0x12490000 #define UART_GSBI2_BASE 0x12480000 -#endif +#endif // __SOC_QUALCOMM_IPQ806X_IOMAP_H_ |