diff options
| author | Martin Roth <martinroth@google.com> | 2016-07-06 10:17:19 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-07-12 22:41:02 +0200 |
| commit | 4934818118bdf36927bc8e15aa4d609ba2348b25 (patch) | |
| tree | 01e83fa3b00126b0e9b4b9574180db4552439325 /src/soc/qualcomm/ipq40xx | |
| parent | 5d2c0ef740b3dae5c7794df11fedab615b90febd (diff) | |
Documentation: Fix doxygen errors
Change-Id: I195fd3a9c7fc07c35913342d2041e1ffef110466
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15549
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/qualcomm/ipq40xx')
| -rw-r--r-- | src/soc/qualcomm/ipq40xx/uart.c | 22 | ||||
| -rw-r--r-- | src/soc/qualcomm/ipq40xx/usb.c | 14 |
2 files changed, 18 insertions, 18 deletions
diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c index 754d17789b..2ea390b933 100644 --- a/src/soc/qualcomm/ipq40xx/uart.c +++ b/src/soc/qualcomm/ipq40xx/uart.c @@ -82,8 +82,8 @@ static const uart_params_t uart_board_param = { }; /** - * msm_boot_uart_dm_init_rx_transfer - Init Rx transfer - * @uart_dm_base: UART controller base address + * @brief msm_boot_uart_dm_init_rx_transfer - Init Rx transfer + * @param uart_dm_base: UART controller base address */ static unsigned int msm_boot_uart_dm_init_rx_transfer(void *uart_dm_base) { @@ -138,9 +138,9 @@ void uart_tx_byte(int idx, unsigned char data) } #endif /* CONFIG_SERIAL_UART */ -/* - * msm_boot_uart_dm_reset - resets UART controller - * @base: UART controller base address +/** + * @brief msm_boot_uart_dm_reset - resets UART controller + * @param base: UART controller base address */ static unsigned int msm_boot_uart_dm_reset(void *base) { @@ -154,9 +154,9 @@ static unsigned int msm_boot_uart_dm_reset(void *base) return MSM_BOOT_UART_DM_E_SUCCESS; } -/* - * msm_boot_uart_dm_init - initilaizes UART controller - * @uart_dm_base: UART controller base address +/** + * @brief msm_boot_uart_dm_init - initilaizes UART controller + * @param uart_dm_base: UART controller base address */ unsigned int msm_boot_uart_dm_init(void *uart_dm_base) { @@ -223,7 +223,7 @@ unsigned int msm_boot_uart_dm_init(void *uart_dm_base) } /** - * ipq40xx_uart_init - initializes UART + * @brief ipq40xx_uart_init - initializes UART * * Initializes clocks, GPIO and UART controller. */ @@ -259,8 +259,8 @@ void ipq40xx_uart_init(void) } /** - * uart_tx_flush - transmits a string of data - * @s: string to transmit + * @brief uart_tx_flush - transmits a string of data + * @param idx: string to transmit */ void uart_tx_flush(int idx) { diff --git a/src/soc/qualcomm/ipq40xx/usb.c b/src/soc/qualcomm/ipq40xx/usb.c index 1ee0e3712f..27e5550b3a 100644 --- a/src/soc/qualcomm/ipq40xx/usb.c +++ b/src/soc/qualcomm/ipq40xx/usb.c @@ -84,9 +84,9 @@ static void setup_dwc3(void); /** * Write register. * - * @base - PHY base virtual address. - * @offset - register offset. - * @val - value to write. + * @param base - PHY base virtual address. + * @param offset - register offset. + * @param val - value to write. */ static inline void qscratch_write(void *base, u32 offset, u32 val) { @@ -96,10 +96,10 @@ static inline void qscratch_write(void *base, u32 offset, u32 val) /** * Write register and read back masked value to confirm it is written * - * @base - base virtual address. - * @offset - register offset. - * @mask - register bitmask specifying what should be updated - * @val - value to write. + * @param base - base virtual address. + * @param offset - register offset. + * @param mask - register bitmask specifying what should be updated + * @param val - value to write. */ static inline void qscratch_write_readback(void *base, u32 offset, const u32 mask, u32 val) |