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authorKan Yan <kyan@google.com>2016-07-14 18:05:20 -0700
committerMartin Roth <martinroth@google.com>2016-07-25 18:56:58 +0200
commit041bc763865414a099622fb4519c9458dfe923c9 (patch)
tree89ab900b9455d51484a42e0b6c16185cb859b25f /src/soc/qualcomm/ipq40xx
parent8edfc1c51235e9ab306cb7b2f3936518f87ddf2a (diff)
google/gale: Fix board ID and GPIO config.
Fix the board ID handling. Recovery switch and WP status GPIO has been reassigned in board rev3. Configure related GPIOs based on Board ID. BUG=chrome-os-partner:55320 TEST=Verified GPIO assignment for Rev.1 board. BRANCH=None Change-Id: Id8e1ba1c039f8b5b503f0da038e5cfc84b72678f Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: d295ab514e31d9ebd1b77e0af9b769e64cbf567e Original-Change-Id: I6d3d5df2e9017f7845edc3cd0b2c19ad7c58a97c Original-Signed-off-by: Kan Yan <kyan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/361393 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://review.coreboot.org/15809 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/qualcomm/ipq40xx')
-rw-r--r--src/soc/qualcomm/ipq40xx/include/soc/cdp.h8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
index 3a90048bac..e5ea8288ca 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
@@ -134,11 +134,9 @@ typedef struct {
#define IPQ_GMAC_NMACS 4
enum gale_board_id {
- BOARD_ID_PROTO_0 = 0,
- BOARD_ID_PROTO_0_2 = 1,
- BOARD_ID_WHIRLWIND = 2,
- BOARD_ID_WHIRLWIND_SP5 = 3,
- BOARD_ID_PROTO_0_2_NAND = 26,
+ BOARD_ID_GALE_EVT = 0,
+ BOARD_ID_GALE_EVT2 = 1,
+ BOARD_ID_GALE_EVT3 = 2,
};
/* Board specific parameters */