diff options
| author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:53:22 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:07:08 +0000 |
| commit | 26f97f9532933da3c1d72a7918c8a24457bbc1c0 (patch) | |
| tree | 8c25279e58ef541fae197ec193f5642a9b21b2d4 /src/soc/qualcomm/ipq40xx/spi.c | |
| parent | 50863daef8ed75c0cb3dfd375e7622c898de5821 (diff) | |
src/soc to src/superio: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ieafbc93e49fcef198ac6e31fc8a3b708c395e08e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58082
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/ipq40xx/spi.c')
| -rw-r--r-- | src/soc/qualcomm/ipq40xx/spi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/qualcomm/ipq40xx/spi.c b/src/soc/qualcomm/ipq40xx/spi.c index da7a6d3560..31677e460f 100644 --- a/src/soc/qualcomm/ipq40xx/spi.c +++ b/src/soc/qualcomm/ipq40xx/spi.c @@ -328,7 +328,7 @@ static unsigned char spi_read_byte(struct ipq_spi_slave *ds) } /* - * Function to check wheather Input or Output FIFO + * Function to check whether Input or Output FIFO * has data to be serviced */ static int check_fifo_status(void *reg_addr) @@ -627,7 +627,7 @@ static int spi_ctrlr_setup(const struct spi_slave *slave) || ((bus == BLSP0_SPI) && (cs > 2)) || ((bus == BLSP1_SPI) && (cs > 0))) { printk(BIOS_ERR, - "SPI error: unsupported bus %d (Supported busses 0, 1 and 2) " + "SPI error: unsupported bus %d (Supported buses 0, 1 and 2) " "or chipselect\n", bus); return -1; } |