diff options
| author | Shelley Chen <shchen@google.com> | 2022-03-29 18:35:20 -0700 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2022-04-01 01:20:58 +0000 |
| commit | dd6b0610e3013563e0c326936cc92e3e384525a9 (patch) | |
| tree | 1ac54496fa00bd457edfd98187615ad317200b7e /src/soc/qualcomm/common | |
| parent | 48f6c2b46fec95c255c1f6dafff6b973199596b3 (diff) | |
soc/qualcomm/common: Increase SPI gpios drive strength to 8mA
EE requested that we increase the drive strength for the SPI lines to
8mA.
BUG=b:198627043
BRANCH=None
TEST=EE help verify
Change-Id: Ic887a7eef74f1063f7284db042c5fbd2e1d5bd4c
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/qualcomm/common')
| -rw-r--r-- | src/soc/qualcomm/common/qspi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/qualcomm/common/qspi.c b/src/soc/qualcomm/common/qspi.c index b6d2b2d5b3..448fb86145 100644 --- a/src/soc/qualcomm/common/qspi.c +++ b/src/soc/qualcomm/common/qspi.c @@ -146,10 +146,10 @@ static void configure_gpios(void) gpio_output(QSPI_CS, 1); gpio_configure(QSPI_DATA_0, GPIO_FUNC_QSPI_DATA_0, - GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT); + GPIO_NO_PULL, GPIO_8MA, GPIO_OUTPUT); gpio_configure(QSPI_DATA_1, GPIO_FUNC_QSPI_DATA_1, - GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT); + GPIO_NO_PULL, GPIO_8MA, GPIO_OUTPUT); gpio_configure(QSPI_CLK, GPIO_FUNC_QSPI_CLK, GPIO_NO_PULL, GPIO_8MA, GPIO_OUTPUT); |