diff options
author | Shelley Chen <shchen@google.com> | 2022-03-31 18:07:59 -0700 |
---|---|---|
committer | Shelley Chen <shchen@google.com> | 2022-04-14 14:05:04 +0000 |
commit | 420ba8b7081757cda307891e7e80f8f2d6b3f762 (patch) | |
tree | 968544174ad7ae7e5c7ec83961367f19db494a73 /src/soc/qualcomm/common/include | |
parent | c3007f38770d192bf32b75331371568447b3623e (diff) |
soc/qualcomm/common: Make clock_configure() check for exact matches
Previously, clock_configure() will configure the clocks to round up to
the next highest frequency bin. This seems non-intuitive. Changing
the logic to find an exact frequency match and will halt booting if no
match is found. Recently fixed a bug in CB:63311, where the clock was
being set incorrectly for emmc and was able to find it because of this
stricter check.
BUG=b:198627043
BRANCH=None
TEST=build herobrine image and try to set SPI frequency to number not
supported. Ensure device doesn't boot.
Change-Id: I9cfad7236241f4d03ff1a56683654649658b68fc
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Diffstat (limited to 'src/soc/qualcomm/common/include')
-rw-r--r-- | src/soc/qualcomm/common/include/soc/clock_common.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/soc/qualcomm/common/include/soc/clock_common.h b/src/soc/qualcomm/common/include/soc/clock_common.h index 0911827149..b08d39bdd8 100644 --- a/src/soc/qualcomm/common/include/soc/clock_common.h +++ b/src/soc/qualcomm/common/include/soc/clock_common.h @@ -145,8 +145,17 @@ enum cb_err enable_and_poll_gdsc_status(void *gdscr_addr); void clock_reset_bcr(void *bcr_addr, bool assert); +/* + * clock_configure(): Configure the clock at the given clock speed (hz). If hz + * does not match any entries in the clk_cfg array, will throw and error and die(). + * + * @param clk struct clock_rcg pointer (root clock generator) + * @param clk_cfg Array with possible clock configurations + * @param hz frequency of clock to set + * @param num_perfs size of clock array + */ enum cb_err clock_configure(struct clock_rcg *clk, struct clock_freq_config *clk_cfg, - uint32_t hz, uint32_t num_perfs); + uint32_t hz, uint32_t num_perfs); void clock_configure_dfsr_table(int qup, struct clock_freq_config *clk_cfg, uint32_t num_perfs); |