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authorFelix Held <felix-coreboot@felixheld.de>2022-05-04 17:34:16 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-05-06 13:35:30 +0000
commit2e4b95da88a5f72269956e34ecaa183cdca48f79 (patch)
tree569117889eabbdb0e397ce6267d8e4830cb5fcb2 /src/soc/nvidia
parentda4e1d780656d6a733f7c2445697466c86a8e901 (diff)
soc/amd/common/include/espi: generalize IO/MMIO decode range macros
Sabrina has more eSPI decode ranges than Picasso or Cezanne. Those registers are however not in one block where it's easy to calculate the addresses of a register from the index of the decode range. Within one group of decode range registers it's still easy to calculate the register address, so move the base address from within the macro to the instantiation of the macro as a preparation for adding the support for the additional ranges. TEST=Timeless build results in identical binary for Mandolin Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id309d955fa3558d660db37a2075240f938361e83 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64052 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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