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| author | Wenbin Mei <wenbin.mei@mediatek.com> | 2020-10-30 09:57:54 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-11-18 06:13:41 +0000 |
| commit | cdba52aaa9f505f55d13bf58be8e24951ce54965 (patch) | |
| tree | e437fa06f4d32b7ceb1dae420d77ec77a8037f2a /src/soc/nvidia/tegra | |
| parent | dfd5ccee758030350957a821a286eaad07b79eaf (diff) | |
mb/google/asurada: Configure pins mode for SD
Configure the pins for SD to msdc1 mode and change the driving
value to 8mA. Enable VCC and VCCQ power supply for SD.
Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Change-Id: I11151c659b251db987f797a6ae4a08a07971144b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47008
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/nvidia/tegra')
0 files changed, 0 insertions, 0 deletions