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| author | Jianjun Wang <jianjun.wang@mediatek.com> | 2024-04-17 11:19:50 +0800 |
|---|---|---|
| committer | Yu-Ping Wu <yupingso@google.com> | 2024-10-28 03:36:27 +0000 |
| commit | 61e3815a255f73db2e5cc669c737fb89756a0bdb (patch) | |
| tree | 5d81534c95af7c3f630394cb00cee8ced59db851 /src/soc/nvidia/tegra210/ram_code.c | |
| parent | e5519ba7265938701aed8603fd0315d518c64509 (diff) | |
soc/mediatek/mt8196: Enable PCIe support
Enable PCIe support for mt8196.
TEST=Build pass, show pcie init pass log:
mtk_pcie_domain_enable: PCIe link up success (1)
BUG=b:317009620
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: I9c0aaa1c6da8c247b319e7ed2317dd871e276461
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84698
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra210/ram_code.c')
0 files changed, 0 insertions, 0 deletions