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| author | Yuchi Chen <yuchi.chen@intel.com> | 2024-10-16 18:28:47 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-10-24 09:18:50 +0000 |
| commit | 5e901d4d769e5a60d039061c195d30fbef51c31a (patch) | |
| tree | 1f1697d0b400173c7cf7a6d4b9e10cae6617e6e2 /src/soc/nvidia/tegra210/mtc.c | |
| parent | e81fdd74a930b0bf8105816ea115ceaeb99bae1d (diff) | |
soc/intel/common: Add PCIe device IDs for Snow Ridge
This patch adds SPI and some accelerator device IDs for SNR platform.
IDs are from Intel Atom Processor C5100, C5300, P5300 and P5700 Product
Families EDS, doc No. 575160 rev 2.0.
Change-Id: I7bd135d788816e4c3c42ac937450cf8cdcea00bc
Signed-off-by: Yuchi Chen <yuchi.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84782
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/nvidia/tegra210/mtc.c')
0 files changed, 0 insertions, 0 deletions