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author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2022-10-21 15:13:43 +0200 |
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committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-02-02 13:19:11 +0000 |
commit | 16598745b8d30d6cddf7f9c59403a2a250124acc (patch) | |
tree | 6e58f057d9dbe5a60a8383e2b90410ac5274aa7e /src/soc/nvidia/tegra210/flow_ctrl.c | |
parent | 794137e2a82eca7e7b2428759007155243009720 (diff) |
util/ifdtool: Add Wellsburg support
Wellsburg is IFDv2 compatible in most fields, but not in all.
It only has 8 regions and the flash master bits match the defines for
IFDv1 and thus has an "IFDv1.5" descriptor.
Add a new enum for IFDv1.5 descriptor and use them to properly operate
on this IFD.
The 'SPI programming guide' is inconsistent and mentions 6 regions
in one place, but 7 regions in another chapter. Tests showed that it
actually supports 7 regions.
Add support using the -p argument to specify Wellsburg platform.
The previous patch made sure that only 8 regions are used and that no
corruption can happen when operating in IFDv2/IFDv1.5 mode.
Tested on Intel Grangeville.
Documents used:
Intel Document Id: 516552
Intel Document Id: 565117
Change-Id: I651730b05deb512478d059174cf8615547d2fde4
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Co-developed-by: Julian Elischer <jrelis@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68657
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/nvidia/tegra210/flow_ctrl.c')
0 files changed, 0 insertions, 0 deletions