t132: Enable cbmem console support

Enabled CBMEM support for t132 platforms. Some of the existing
code is moved around to avoid dependencies in the other stages
that need it.

BUG=None
BRANCH=None
TEST=Built and booted a rush with cbmem support.

Original-Change-Id: I78a31b58ab9cc01a7b5d1fffdb6c8ae0c446c7dd
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/207163
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit f552197dbda06c754b5664c3bed4ed361154229a)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I8fa2919714b467cc976e5bb5c4716e5b7979694b
Reviewed-on: http://review.coreboot.org/8589
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>

1 files changed, 52 insertions, 0 deletions

diff --git a/src/soc/nvidia/tegra132/addressmap.c b/src/soc/nvidia/tegra132/addressmap.c
new file mode 100644
index 0000000000..92a7d76f65
--- /dev/null
+++ b/src/soc/nvidia/tegra132/addressmap.c
@@ -0,0 +1,52 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+
+#include <arch/io.h>
+#include <stdlib.h>
+#include <console/console.h>
+#include <soc/addressmap.h>
+#include "mc.h"
+#include "sdram.h"
+
+/* returns total amount of DRAM (in MB) from memory controller registers */
+int sdram_size_mb(void)
+{
+	struct tegra_mc_regs *mc = (struct tegra_mc_regs *)TEGRA_MC_BASE;
+	static int total_size = 0;
+
+	if (total_size)
+		return total_size;
+
+	/*
+	 * This obtains memory size from the External Memory Aperture
+	 * Configuration register. Nvidia confirmed that it is safe to assume
+	 * this value represents the total physical DRAM size.
+	 */
+	total_size = (read32(&mc->emem_cfg) >> MC_EMEM_CFG_SIZE_MB_SHIFT) &
+		      MC_EMEM_CFG_SIZE_MB_MASK;
+
+	printk(BIOS_DEBUG, "%s: Total SDRAM (MB): %u\n", __func__, total_size);
+	return total_size;
+}
+
+uintptr_t sdram_max_addressable_mb(void)
+{
+	return MIN((CONFIG_SYS_SDRAM_BASE/MiB) + sdram_size_mb(), 4096);
+}