aboutsummaryrefslogtreecommitdiff
path: root/src/soc/nvidia/tegra132/addressmap.c
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2014-07-14 15:00:41 -0500
committerMarc Jones <marc.jones@se-eng.com>2015-03-05 17:32:19 +0100
commit5f66b5246443e4387a4147745666dc091556ff07 (patch)
tree667542822342b3b6e2bc3ba7ab7dc4741b532c5a /src/soc/nvidia/tegra132/addressmap.c
parent9c8cfc5c25876991751ff4e533a0c421203139c8 (diff)
tegra132: add support for TZ carve-out
The TrustZone carve-out needs to be taken into account when determining the memory layout. However, things are complicated by the fact that TZ carve-out registers are not accessible by the AVP. BUG=chrome-os-partner:30572 BRANCH=None TEST=Built and booted to end of ramstage. Noted that denver cores can read TZ registers while AVP doesn't bother. Original-Change-Id: I2d2d27e33a334bf639af52260b99d8363906c646 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/207835 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Tom Warren <twarren@nvidia.com> (cherry picked from commit a4d792f4ed6a0c39eab09d90f4454d3d5dc3db26) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I8fbef03d5ac42d300e1e41aeba9b86c929e01494 Reviewed-on: http://review.coreboot.org/8593 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/nvidia/tegra132/addressmap.c')
-rw-r--r--src/soc/nvidia/tegra132/addressmap.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/addressmap.c b/src/soc/nvidia/tegra132/addressmap.c
index 7620b1f789..bb35a878e6 100644
--- a/src/soc/nvidia/tegra132/addressmap.c
+++ b/src/soc/nvidia/tegra132/addressmap.c
@@ -23,6 +23,7 @@
#include <console/console.h>
#include <soc/addressmap.h>
#include <soc/display.h>
+#include <soc/id.h>
#include "mc.h"
#include "sdram.h"
@@ -70,6 +71,13 @@ void carveout_range(int id, uintptr_t *base_mib, size_t *size_mib)
switch (id) {
case CARVEOUT_TZ:
+ /* AVP does not have access to the TZ carveout registers. */
+ if (context_avp())
+ return;
+ carveout_from_regs(base_mib, size_mib,
+ read32(&mc->security_cfg0),
+ 0,
+ read32(&mc->security_cfg1));
break;
case CARVEOUT_SEC:
carveout_from_regs(base_mib, size_mib,