summaryrefslogtreecommitdiff
path: root/src/soc/nvidia/tegra124/sdram_param.h
diff options
context:
space:
mode:
authorTom Warren <twarren@nvidia.com>2014-01-23 13:37:50 -0700
committerMarc Jones <marc.jones@se-eng.com>2014-10-22 03:56:49 +0200
commit64982c5002994270e1fc010cc8d2119c20f62184 (patch)
tree025c601d766107d6bde7a7ce5c7755a0e59be9d2 /src/soc/nvidia/tegra124/sdram_param.h
parentb3f08c61f15970ef3d9e197b02d6dedb8b2c5830 (diff)
tegra/nyan*: sdram updates
nyan_big: Add 204MHz BCT for bringup, use 1.2V for VDD_CPU Reviewed-on: https://chromium-review.googlesource.com/183939 (cherry picked from commit a6df76afb5342b805baca749abb8265e15748dc1) nyan_big: Add initial 792MHz BCT Reviewed-on: https://chromium-review.googlesource.com/183975 (cherry picked from commit 61d0122fdce6dc9479666bb0a5bc079c6389f78a) nyan_big: use RAM_CODE[3:2] for ram code Reviewed-on: https://chromium-review.googlesource.com/184076 (cherry picked from commit 35e5c5e473f871cdc897473a31586afbececd716) tegra124: support tri-state Board Id Reviewed-on: https://chromium-review.googlesource.com/183855 (cherry picked from commit 1a9d1bd73aa2cd0c36203b247976ad0d00a360e4) nyan*: Fix SPI pinmux configuration Reviewed-on: https://chromium-review.googlesource.com/184281 (cherry picked from commit ac4106b673c285af66d72392bd4a8522aba98489) nyan_big: Add 4GB 204/792MHz BCTs Reviewed-on: https://chromium-review.googlesource.com/184159 (cherry picked from commit 5ff002d09f8db0543b58962f6c0d24627fb0937e) tegra124: Add function for obtaining DRAM size via MC regs Reviewed-on: https://chromium-review.googlesource.com/184535 (cherry picked from commit d4580c46de649903a266a99eb11c9126ba385b48) tegra124/nyan*: Obtain DRAM size dynamically Reviewed-on: https://chromium-review.googlesource.com/184431 (cherry picked from commit a7db71744771decc04cf1966efba70bf4897cfa3) tegra124: Rearrange iRAM layout to allow more space for romstage Reviewed-on: https://chromium-review.googlesource.com/184240 (cherry picked from commit 6bdaabbc068146a4516c724b71d31bb777dabcfc) tegra124: Fix MemoryType field name in SDRAM parameters. Reviewed-on: https://chromium-review.googlesource.com/185113 (cherry picked from commit 9caccd1e86a8c683402fab87d9f3a49b87496e97) nyan_big: Initialize SDRAM without BootROM. Reviewed-on: https://chromium-review.googlesource.com/183624 (cherry picked from commit a1cbc00aa80ec1ea52e833a8e31c8e4b27160e70) tegra124: move FB_SIZE_MB to a more appropriate location Reviewed-on: https://chromium-review.googlesource.com/184930 (cherry picked from commit ddea486fd4410394417c4e59039d46a324918bdc) nyan: Initialize SDRAM without BootROM. Reviewed-on: https://chromium-review.googlesource.com/185114 (cherry picked from commit 1ff51b580b28553919f91b11b443251b048cf26b) tegra124: Save SDRAM parameters to PMC registers for LP0 Reviewed-on: https://chromium-review.googlesource.com/182928 (cherry picked from commit 7476b4bd0ecdc312476cce871d22f57915a0bd86) tegra124: Rewrite SDRAM parameter saving code to be more efficient Reviewed-on: https://chromium-review.googlesource.com/184388 (cherry picked from commit 25084bd0407624e4b2ff82388c32af1198c501a6) nyan: Slightly change the way SDRAM parameter files are set up Reviewed-on: https://chromium-review.googlesource.com/185286 (cherry picked from commit a31887b804f23e031c395113db582cd71f3d1b6d) Squashed 16 commits for SDRAM support on nyan and nyan_big. Change-Id: I07419985376277083d62400dd14fe8273f6d5ca8 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6949 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/soc/nvidia/tegra124/sdram_param.h')
-rw-r--r--src/soc/nvidia/tegra124/sdram_param.h20
1 files changed, 11 insertions, 9 deletions
diff --git a/src/soc/nvidia/tegra124/sdram_param.h b/src/soc/nvidia/tegra124/sdram_param.h
index 1f05566d55..c845611da0 100644
--- a/src/soc/nvidia/tegra124/sdram_param.h
+++ b/src/soc/nvidia/tegra124/sdram_param.h
@@ -33,25 +33,27 @@
enum {
/* Specifies the memory type to be undefined */
- MEMORY_TYPE_NONE = 0,
+ NvBootMemoryType_None = 0,
/* Specifies the memory type to be DDR SDRAM */
- MEMORY_TYPE_DDR = 0,
+ NvBootMemoryType_Ddr = 0,
/* Specifies the memory type to be LPDDR SDRAM */
- MEMORY_TYPE_LPDDR = 0,
+ NvBootMemoryType_LpDdr = 0,
/* Specifies the memory type to be DDR2 SDRAM */
- MEMORY_TYPE_DDR2 = 0,
+ NvBootMemoryType_Ddr2 = 0,
/* Specifies the memory type to be LPDDR2 SDRAM */
- MEMORY_TYPE_LPDDR2,
+ NvBootMemoryType_LpDdr2,
/* Specifies the memory type to be DDR3 SDRAM */
- MEMORY_TYPE_DDR3,
+ NvBootMemoryType_Ddr3,
- MEMORY_TYPE_NUM,
- MEMORY_TYPE_FORCE32 = 0X7FFFFFF
+ NvBootMemoryType_Num,
+
+ /* Specifies an entry in the ram_code table that's not in use */
+ NvBootMemoryType_Unused = 0X7FFFFFF,
};
enum {
@@ -69,7 +71,7 @@ enum {
struct sdram_params {
/* Specifies the type of memory device */
- uint32_t memory_type;
+ uint32_t MemoryType;
/* MC/EMC clock source configuration */