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authorGabe Black <gabeblack@google.com>2013-10-06 06:13:24 -0700
committerIsaac Christensen <isaac.christensen@se-eng.com>2014-08-18 19:10:58 +0200
commite97b6835f4dcd70ebf23941fb2f56c0d9d1d3e97 (patch)
tree258bcfb554ee91728b285f5741fefefd1c128761 /src/soc/nvidia/tegra124/include
parentb59e8505d841bafb9ffdaf2086f46d62a0e1689a (diff)
tegra: Change how tegra124 and tegra include files from each other.
A problem with including the tegra124 directory directly in the include path is that it makes all headers in that directory first level headers available everywhere including places that have nothing to do with the SOC, even headers which were only intended for local use by tegra124 code. This change modifies things a bit to be more like the way the arch headers are chosen. In the tegra124 directory, there's an include directory which has an soc subdirectory in it. That include directory is added to the include path, making it possible to have headers private to the tegra124. When files specific to whatever tegra is being built for are needed, you can include <soc/foo.h> and get the version specific to that particular soc. Also, the soc.h header file was overhauled to use enums instead of defines, to consistently name things as far as their prefix (the less cryptic TEGRA instead of NV_PA) and suffixes like "BASE", and to get rid of values which were specific to U-Boot which we don't need. Since the only thing in the file were address constants, I also renamed the file addressmap.h. It would be included as: <soc/addressmap.h> which I think is easy to remember, does what you'd think it does from the name, and won't conflict with other header files just minding their own business in some other directory. Change-Id: I6a1be1ba28417b7103ad8584e6ec5024a7ff4e55 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/172080 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Ronald Minnich <rminnich@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 2c554f58f9ee18e151e824f01c03eb3f0e907858) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6659 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/soc/nvidia/tegra124/include')
-rw-r--r--src/soc/nvidia/tegra124/include/soc/addressmap.h60
1 files changed, 60 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra124/include/soc/addressmap.h b/src/soc/nvidia/tegra124/include/soc/addressmap.h
new file mode 100644
index 0000000000..edacf150ca
--- /dev/null
+++ b/src/soc/nvidia/tegra124/include/soc/addressmap.h
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
+ * Copyright 2013 Google Inc.
+ *
+ * (C) Copyright 2010,2011
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __SOC_NVIDIA_TEGRA124_INCLUDE_SOC_ADDRESS_MAP_H__
+#define __SOC_NVIDIA_TEGRA124_INCLUDE_SOC_ADDRESS_MAP_H__
+
+enum {
+ TEGRA_SRAM_BASE = 0x40000000,
+ TEGRA_SRAM_SIZE = 0x20000
+};
+
+enum {
+ TEGRA_ARM_PERIPHBASE = 0x50040000,
+ TEGRA_PG_UP_BASE = 0x60000000,
+ TEGRA_TMRUS_BASE = 0x60005010,
+ TEGRA_CLK_RST_BASE = 0x60006000,
+ TEGRA_FLOW_BASE = 0x60007000,
+ TEGRA_GPIO_BASE = 0x6000D000,
+ TEGRA_EVP_BASE = 0x6000F000,
+ TEGRA_APB_MISC_BASE = 0x70000000,
+ TEGRA_APB_MISC_GP_BASE = TEGRA_APB_MISC_BASE + 0x0800,
+ TEGRA_APB_UARTA_BASE = TEGRA_APB_MISC_BASE + 0x6000,
+ TEGRA_APB_UARTB_BASE = TEGRA_APB_MISC_BASE + 0x6040,
+ TEGRA_APB_UARTC_BASE = TEGRA_APB_MISC_BASE + 0x6200,
+ TEGRA_APB_UARTD_BASE = TEGRA_APB_MISC_BASE + 0x6300,
+ TEGRA_APB_UARTE_BASE = TEGRA_APB_MISC_BASE + 0x6400,
+ TEGRA_NAND_BASE = TEGRA_APB_MISC_BASE + 0x8000,
+ TEGRA_SPI_BASE = TEGRA_APB_MISC_BASE + 0xC380,
+ TEGRA_SLINK1_BASE = TEGRA_APB_MISC_BASE + 0xD400,
+ TEGRA_SLINK2_BASE = TEGRA_APB_MISC_BASE + 0xD600,
+ TEGRA_SLINK3_BASE = TEGRA_APB_MISC_BASE + 0xD800,
+ TEGRA_SLINK4_BASE = TEGRA_APB_MISC_BASE + 0xDA00,
+ TEGRA_SLINK5_BASE = TEGRA_APB_MISC_BASE + 0xDC00,
+ TEGRA_SLINK6_BASE = TEGRA_APB_MISC_BASE + 0xDE00,
+ TEGRA_DVC_BASE = TEGRA_APB_MISC_BASE + 0xD000,
+ TEGRA_PMC_BASE = TEGRA_APB_MISC_BASE + 0xE400,
+ TEGRA_EMC_BASE = TEGRA_APB_MISC_BASE + 0xF400,
+ TEGRA_FUSE_BASE = TEGRA_APB_MISC_BASE + 0xF800,
+ TEGRA_CSITE_BASE = 0x70040000,
+ TEGRA_USB_ADDR_MASK = 0xFFFFC000,
+};
+
+#endif /* __SOC_NVIDIA_TEGRA124_INCLUDE_SOC_ADDRESS_MAP_H__ */