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authorFengquan Chen <fengquan.chen@mediatek.corp-partner.google.com>2021-08-25 20:01:33 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-09-08 08:25:19 +0000
commit62aa2bb784af331f5323ced9ebad6497ef3b8274 (patch)
tree0b931418a579f9abdf95e0a9258f38ce021476f0 /src/soc/mediatek
parent766e481adb2091e45a016159cc97d72898606036 (diff)
soc/mediatek: preserve WDT reset reason for debugging
1. Disable external output reset signal in first WDT reset to preserve WDT original reset reason for WDT issue in kernel stage. 2. After preserved WDT reset reason, do fully reset again by sending external output reset signal. BUG=b:194025005 TEST=boot to kernel ok and function test pass Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.corp-partner.google.com> Change-Id: I5887a8312f4daab3cbd0a30fea0195670a932e52 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57270 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/common/wdt.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/wdt.c b/src/soc/mediatek/common/wdt.c
index 44a9ce50b6..05bd27d277 100644
--- a/src/soc/mediatek/common/wdt.c
+++ b/src/soc/mediatek/common/wdt.c
@@ -19,6 +19,14 @@ int mtk_wdt_init(void)
if (wdt_sta & MTK_WDT_STA_HW_RST) {
printk(BIOS_INFO, "hardware watchdog\n");
mark_watchdog_tombstone();
+
+ /*
+ * We trigger secondary reset by triggering WDT hardware to send signal to EC.
+ * We do not use do_board_reset() to send signal to EC
+ * which is controlled by software driver.
+ */
+ write32(&mtk_wdt->wdt_mode, MTK_WDT_MODE_EXTEN | MTK_WDT_MODE_KEY);
+ write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY);
} else if (wdt_sta & MTK_WDT_STA_SW_RST)
printk(BIOS_INFO, "normal software reboot\n");
else if (wdt_sta & MTK_WDT_STA_SPM_RST)