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authorCliff Huang <cliff.huang@intel.com>2024-09-12 16:26:37 -0700
committerFelix Held <felix-coreboot@felixheld.de>2024-09-19 13:47:09 +0000
commit5105888e2d227faf60418a9d6ac8a070462d1fce (patch)
tree2914b9b8ae4947c17fefe527a24dadd7fd1c67ba /src/soc/mediatek
parentc6493d3b809af8ed5e55c48209d3dbe1a91f32b7 (diff)
soc/intel/common/block/acpi: exclude DMI fixed memory range if no DMI
In newer SOC, such as PTL, there is no DMI. Exclude DMI memory range in northbridge.asl if DMI_BASE_SIZE is '0' BUG=b:348678529 TEST=Build CB with DMI_BASE_SIZE set to '0' in the SOC directory. Boot to OS and check ACPI PDRC device from the ACPI DSDT table. There should not have an entry for DMI in its _CRS method. Verified on IntelĀ® SimicsĀ® Pre Silicon Simulation platform for PTL using google/fatcat mainboard. Signed-off-by: Cliff Huang <cliff.huang@intel.com> Change-Id: I971af2eb214b5940fa09d9dc0f9717bb5f0dfb4d Reviewed-on: https://review.coreboot.org/c/coreboot/+/84349 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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